Lines Matching defs:sc
40 #define HREAD4(sc, reg) \
41 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
42 #define HWRITE4(sc, reg, val) \
43 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
79 struct aplpwm_softc *sc = (struct aplpwm_softc *)self;
87 sc->sc_iot = faa->fa_iot;
88 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
89 faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
94 sc->sc_clkin = clock_get_frequency(faa->fa_node, NULL);
95 if (sc->sc_clkin == 0) {
104 sc->sc_pd.pd_node = faa->fa_node;
105 sc->sc_pd.pd_cookie = sc;
106 sc->sc_pd.pd_get_state = aplpwm_get_state;
107 sc->sc_pd.pd_set_state = aplpwm_set_state;
108 pwm_register(&sc->sc_pd);
114 struct aplpwm_softc *sc = cookie;
118 ctrl = HREAD4(sc, PWM_CTRL);
119 on_cycles = HREAD4(sc, PWM_ON_CYCLES);
120 off_cycles = HREAD4(sc, PWM_OFF_CYCLES);
123 ps->ps_period = ((on_cycles + off_cycles) * NS_PER_S) / sc->sc_clkin;
124 ps->ps_pulse_width = (on_cycles * NS_PER_S) / sc->sc_clkin;
134 struct aplpwm_softc *sc = cookie;
141 cycles = (ps->ps_period * sc->sc_clkin) / NS_PER_S;
142 on_cycles = (ps->ps_pulse_width * sc->sc_clkin) / NS_PER_S;
152 HWRITE4(sc, PWM_ON_CYCLES, on_cycles);
153 HWRITE4(sc, PWM_OFF_CYCLES, off_cycles);
154 HWRITE4(sc, PWM_CTRL, ctrl);