Lines Matching defs:dbl

3743 			      int treg, int breg, int dbl)
3748 if (! dbl && ! ((ep->X_add_number & ~((bfd_vma) 0x7fffffff))
3904 load_register (int reg, expressionS *ep, int dbl)
3914 if (! dbl && ! ((ep->X_add_number & ~((bfd_vma) 0x7fffffff))
4495 int dbl = 0;
4520 dbl = 1;
4537 macro_build (NULL, dbl ? "dsub" : "sub", "d,v,t", dreg, 0, sreg);
4551 dbl = 1;
4556 dbl = 1;
4567 load_register (AT, &imm_expr, dbl);
5013 dbl = 1;
5018 dbl = 1;
5038 macro_build (NULL, dbl ? "ddiv" : "div", "z,s,t", sreg, treg);
5044 macro_build (NULL, dbl ? "ddiv" : "div", "z,s,t", sreg, treg);
5048 load_register (AT, &expr1, dbl);
5049 expr1.X_add_number = mips_trap ? (dbl ? 12 : 8) : (dbl ? 20 : 16);
5051 if (dbl)
5054 load_register (AT, &expr1, dbl);
5101 dbl = 1;
5106 dbl = 1;
5111 dbl = 1;
5116 dbl = 1;
5143 macro_build (NULL, dbl ? "dneg" : "neg", "d,w", dreg, sreg);
5150 load_register (AT, &imm_expr, dbl);
5197 dbl = 1;
5202 dbl = 1;
5208 if (dbl && HAVE_32BIT_GPRS)
5211 if (! dbl && HAVE_64BIT_OBJECTS)
5219 (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu",
5268 (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu",
5272 (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu",
5289 ? (dbl || HAVE_64BIT_ADDRESSES)
5844 s = (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu";
7290 int dbl = 0;
7313 dbl = 1;
7315 macro_build (NULL, dbl ? "dmultu" : "multu", "s,t", sreg, treg);
7320 dbl = 1;
7325 load_register (AT, &imm_expr, dbl);
7326 macro_build (NULL, dbl ? "dmult" : "mult", "s,t", sreg, AT);
7331 dbl = 1;
7337 dbl = 1;
7344 load_register (AT, &imm_expr, dbl);
7345 macro_build (NULL, dbl ? "dmult" : "mult", "s,t", sreg, imm ? AT : treg);
7347 macro_build (NULL, dbl ? "dsra32" : "sra", "d,w,<", dreg, dreg, RA);
7363 dbl = 1;
7369 dbl = 1;
7376 load_register (AT, &imm_expr, dbl);
7377 macro_build (NULL, dbl ? "dmultu" : "multu", "s,t",
7793 dbl = 1;
7800 macro_build (&imm_expr, dbl ? "daddi" : "addi", "t,r,j",
7804 load_register (AT, &imm_expr, dbl);
7805 macro_build (NULL, dbl ? "dsub" : "sub", "d,v,t", dreg, sreg, AT);
7809 dbl = 1;
7816 macro_build (&imm_expr, dbl ? "daddiu" : "addiu", "t,r,j",
7820 load_register (AT, &imm_expr, dbl);
7821 macro_build (NULL, dbl ? "dsubu" : "subu", "d,v,t", dreg, sreg, AT);
8077 int dbl;
8091 dbl = 0;
8099 dbl = 1;
8104 dbl = 1;
8111 macro_build (NULL, dbl ? "ddiv" : "div", "0,x,y", xreg, yreg);
8152 dbl = 1;
8154 macro_build (NULL, dbl ? "dmultu" : "multu", "x,y", xreg, yreg);
8159 dbl = 1;
8166 macro_build (&imm_expr, dbl ? "daddiu" : "addiu", "y,x,4", yreg, xreg);