binutils-2.17/opcodes/m10200-opc.c

52 #define AM0      (AN1+1)
56 #define AM1      (AM0+1)
168 { "mov",	0xf270,		0xfff0,		FMT_4, {AN1, AM0}},
180 { "mov",	0x7000,		0xf000,		FMT_2, {MEM2(SD8,AN1), AM0}},
181 { "mov",	0x7000,		0xf000,		FMT_2, {MEM(AN1), AM0}},
182 { "mov",	0xf7b00000,	0xfff00000,	FMT_6, {MEM2(SD16, AN1), AM0}},
183 { "mov",	0xf4f00000,	0xfff00000,	FMT_7, {MEM2(IMM24,AN1), AM0}},
184 { "mov",	0xf100,		0xffc0,		FMT_4, {MEM2(DI, AN1), AM0}},
194 { "mov",	0x5000,		0xf000,		FMT_2, {AM0, MEM2(SD8, AN1)}},
195 { "mov",	0x5000,		0xf000,		FMT_2, {AM0, MEM(AN1)}},
196 { "mov",	0xf7a00000,	0xfff00000,	FMT_6, {AM0, MEM2(SD16, AN1)}},
197 { "mov",	0xf4100000,	0xfff00000,	FMT_7, {AM0, MEM2(IMM24,AN1)}},
198 { "mov",	0xf180,		0xffc0,		FMT_4, {AM0, MEM2(DI, AN1)}},
243 { "add",	0xf240,		0xfff0,		FMT_4, {AN1, AM0}},
256 { "sub",	0xf250,		0xfff0,		FMT_4, {AN1, AM0}},
271 { "cmp",	0xf260,		0xfff0,		FMT_4, {AN1, AM0}},