binutils-2.17/bfd/xtensa-modules.c

1496   unsigned immrx4_0, r_0;
1497   r_0 = *valp & 0xf;
1498   immrx4_0 = ((((0xfffffff)) << 4) | r_0) << 2;
1506   unsigned r_0, immrx4_0;
1508   r_0 = ((immrx4_0 >> 2) & 0xf);
1509   *valp = r_0;
1516   unsigned lsi4x4_0, r_0;
1517   r_0 = *valp & 0xf;
1518   lsi4x4_0 = r_0 << 2;
1526   unsigned r_0, lsi4x4_0;
1528   r_0 = ((lsi4x4_0 >> 2) & 0xf);
1529   *valp = r_0;
1628   unsigned b4const_0, r_0;
1629   r_0 = *valp & 0xf;
1630   b4const_0 = CONST_TBL_b4c_0[r_0 & 0xf];
1638   unsigned r_0, b4const_0;
1642     case 0xffffffff: r_0 = 0; break;
1643     case 0x1: r_0 = 0x1; break;
1644     case 0x2: r_0 = 0x2; break;
1645     case 0x3: r_0 = 0x3; break;
1646     case 0x4: r_0 = 0x4; break;
1647     case 0x5: r_0 = 0x5; break;
1648     case 0x6: r_0 = 0x6; break;
1649     case 0x7: r_0 = 0x7; break;
1650     case 0x8: r_0 = 0x8; break;
1651     case 0xa: r_0 = 0x9; break;
1652     case 0xc: r_0 = 0xa; break;
1653     case 0x10: r_0 = 0xb; break;
1654     case 0x20: r_0 = 0xc; break;
1655     case 0x40: r_0 = 0xd; break;
1656     case 0x80: r_0 = 0xe; break;
1657     default: r_0 = 0xf; break;
1659   *valp = r_0;
1666   unsigned b4constu_0, r_0;
1667   r_0 = *valp & 0xf;
1668   b4constu_0 = CONST_TBL_b4cu_0[r_0 & 0xf];
1676   unsigned r_0, b4constu_0;
1680     case 0x8000: r_0 = 0; break;
1681     case 0x10000: r_0 = 0x1; break;
1682     case 0x2: r_0 = 0x2; break;
1683     case 0x3: r_0 = 0x3; break;
1684     case 0x4: r_0 = 0x4; break;
1685     case 0x5: r_0 = 0x5; break;
1686     case 0x6: r_0 = 0x6; break;
1687     case 0x7: r_0 = 0x7; break;
1688     case 0x8: r_0 = 0x8; break;
1689     case 0xa: r_0 = 0x9; break;
1690     case 0xc: r_0 = 0xa; break;
1691     case 0x10: r_0 = 0xb; break;
1692     case 0x20: r_0 = 0xc; break;
1693     case 0x40: r_0 = 0xd; break;
1694     case 0x80: r_0 = 0xe; break;
1695     default: r_0 = 0xf; break;
1697   *valp = r_0;