Lines Matching refs:__mmask32
357 _mm512_mask_add_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
359 (__mmask32)__U, (__v32hf)_mm512_add_ph(__A, __B), (__v32hf)__W);
363 _mm512_maskz_add_ph(__mmask32 __U, __m512h __A, __m512h __B) {
364 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
375 (__mmask32)(U), (__v32hf)_mm512_add_round_ph((A), (B), (R)), \
380 (__mmask32)(U), (__v32hf)_mm512_add_round_ph((A), (B), (R)), \
389 _mm512_mask_sub_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
391 (__mmask32)__U, (__v32hf)_mm512_sub_ph(__A, __B), (__v32hf)__W);
395 _mm512_maskz_sub_ph(__mmask32 __U, __m512h __A, __m512h __B) {
396 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
407 (__mmask32)(U), (__v32hf)_mm512_sub_round_ph((A), (B), (R)), \
412 (__mmask32)(U), (__v32hf)_mm512_sub_round_ph((A), (B), (R)), \
421 _mm512_mask_mul_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
423 (__mmask32)__U, (__v32hf)_mm512_mul_ph(__A, __B), (__v32hf)__W);
427 _mm512_maskz_mul_ph(__mmask32 __U, __m512h __A, __m512h __B) {
428 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
439 (__mmask32)(U), (__v32hf)_mm512_mul_round_ph((A), (B), (R)), \
444 (__mmask32)(U), (__v32hf)_mm512_mul_round_ph((A), (B), (R)), \
453 _mm512_mask_div_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
455 (__mmask32)__U, (__v32hf)_mm512_div_ph(__A, __B), (__v32hf)__W);
459 _mm512_maskz_div_ph(__mmask32 __U, __m512h __A, __m512h __B) {
460 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
471 (__mmask32)(U), (__v32hf)_mm512_div_round_ph((A), (B), (R)), \
476 (__mmask32)(U), (__v32hf)_mm512_div_round_ph((A), (B), (R)), \
486 _mm512_mask_min_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
488 (__mmask32)__U, (__v32hf)_mm512_min_ph(__A, __B), (__v32hf)__W);
492 _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) {
493 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
504 (__mmask32)(U), (__v32hf)_mm512_min_round_ph((A), (B), (R)), \
509 (__mmask32)(U), (__v32hf)_mm512_min_round_ph((A), (B), (R)), \
519 _mm512_mask_max_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
521 (__mmask32)__U, (__v32hf)_mm512_max_ph(__A, __B), (__v32hf)__W);
525 _mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) {
526 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
537 (__mmask32)(U), (__v32hf)_mm512_max_round_ph((A), (B), (R)), \
542 (__mmask32)(U), (__v32hf)_mm512_max_round_ph((A), (B), (R)), \
789 ((__mmask32)__builtin_ia32_cmpph512_mask((__v32hf)(__m512h)(A), \
791 (__mmask32)-1, (int)(R)))
794 ((__mmask32)__builtin_ia32_cmpph512_mask((__v32hf)(__m512h)(A), \
796 (__mmask32)(U), (int)(R)))
970 (__v32hf)__A, (__v32hf)_mm512_undefined_ph(), (__mmask32)-1);
974 _mm512_mask_rcp_ph(__m512h __W, __mmask32 __U, __m512h __A) {
976 (__mmask32)__U);
980 _mm512_maskz_rcp_ph(__mmask32 __U, __m512h __A) {
982 (__v32hf)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U);
987 (__v32hf)__A, (__v32hf)_mm512_undefined_ph(), (__mmask32)-1);
991 _mm512_mask_rsqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) {
993 (__mmask32)__U);
997 _mm512_maskz_rsqrt_ph(__mmask32 __U, __m512h __A) {
999 (__v32hf)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U);
1005 (__v32hf)_mm512_undefined_ph(), (__mmask32)-1, \
1011 (__mmask32)(U), _MM_FROUND_CUR_DIRECTION))
1016 (__v32hf)_mm512_setzero_ph(), (__mmask32)(U), _MM_FROUND_CUR_DIRECTION))
1021 (__v32hf)_mm512_undefined_ph(), (__mmask32)-1, (int)(R)))
1026 (__mmask32)(U), (int)(R)))
1031 (__v32hf)_mm512_setzero_ph(), (__mmask32)(U), (int)(R)))
1035 (__v32hf)__A, (__v32hf)_mm512_undefined_ph(), (__mmask32)-1,
1040 _mm512_mask_getexp_ph(__m512h __W, __mmask32 __U, __m512h __A) {
1042 (__v32hf)__A, (__v32hf)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1046 _mm512_maskz_getexp_ph(__mmask32 __U, __m512h __A) {
1048 (__v32hf)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U,
1055 (__mmask32)-1, (int)(R)))
1059 (__v32hf)(__m512h)(A), (__v32hf)(__m512h)(W), (__mmask32)(U), (int)(R)))
1064 (__mmask32)(U), (int)(R)))
1069 (__v32hf)__A, (__v32hf)__B, (__v32hf)_mm512_undefined_ph(), (__mmask32)-1,
1074 _mm512_mask_scalef_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
1076 (__v32hf)__W, (__mmask32)__U,
1081 _mm512_maskz_scalef_ph(__mmask32 __U, __m512h __A, __m512h __B) {
1083 (__v32hf)__A, (__v32hf)__B, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U,
1090 (__v32hf)_mm512_undefined_ph(), (__mmask32)-1, (int)(R)))
1095 (__mmask32)(U), (int)(R)))
1100 (__v32hf)_mm512_setzero_ph(), (__mmask32)(U), (int)(R)))
1104 (__v32hf)(__m512h)(A), (int)(B), (__v32hf)(__m512h)(A), (__mmask32)-1, \
1110 (__mmask32)(B), _MM_FROUND_CUR_DIRECTION))
1115 (__mmask32)(A), _MM_FROUND_CUR_DIRECTION))
1120 (__mmask32)(B), (int)(R)))
1125 (__mmask32)(A), (int)(R)))
1130 (__mmask32)-1, (int)(R)))
1135 (__mmask32)-1, _MM_FROUND_CUR_DIRECTION))
1140 (__mmask32)(U), _MM_FROUND_CUR_DIRECTION))
1145 (__mmask32)(U), _MM_FROUND_CUR_DIRECTION))
1150 (__mmask32)(U), (int)(R)))
1155 (__mmask32)(U), (int)(R)))
1160 (__mmask32)-1, (int)(R)))
1370 (__mmask32)(U), (__v32hf)_mm512_sqrt_round_ph((A), (R)), \
1375 (__mmask32)(U), (__v32hf)_mm512_sqrt_round_ph((A), (R)), \
1384 _mm512_mask_sqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) {
1386 (__mmask32)(__U),
1392 _mm512_maskz_sqrt_ph(__mmask32 __U, __m512h __A) {
1394 (__mmask32)(__U),
1422 __mmask32 __U,
1430 static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_sh(__mmask32 __U,
1439 ((__mmask32)__builtin_ia32_fpclassph512_mask((__v32hf)(__m512h)(A), \
1440 (int)(imm), (__mmask32)(U)))
1443 ((__mmask32)__builtin_ia32_fpclassph512_mask((__v32hf)(__m512h)(A), \
1444 (int)(imm), (__mmask32)-1))
1669 (__mmask32)(-1), (int)(R)))
1673 (__mmask32)(U), (int)(R)))
1678 (__mmask32)(U), (int)(R)))
1683 (__v32hf)__A, (__v32hi)_mm512_setzero_epi32(), (__mmask32)-1,
1688 _mm512_mask_cvtph_epi16(__m512i __W, __mmask32 __U, __m512h __A) {
1690 (__v32hf)__A, (__v32hi)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1694 _mm512_maskz_cvtph_epi16(__mmask32 __U, __m512h __A) {
1696 (__v32hf)__A, (__v32hi)_mm512_setzero_epi32(), (__mmask32)__U,
1702 (__v32hf)(A), (__v32hi)_mm512_undefined_epi32(), (__mmask32)(-1), \
1707 (__mmask32)(U), (int)(R)))
1712 (__mmask32)(U), (int)(R)))
1717 (__v32hf)__A, (__v32hi)_mm512_setzero_epi32(), (__mmask32)-1,
1722 _mm512_mask_cvttph_epi16(__m512i __W, __mmask32 __U, __m512h __A) {
1724 (__v32hf)__A, (__v32hi)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1728 _mm512_maskz_cvttph_epi16(__mmask32 __U, __m512h __A) {
1730 (__v32hf)__A, (__v32hi)_mm512_setzero_epi32(), (__mmask32)__U,
1737 (__mmask32)(-1), (int)(R)))
1741 (__mmask32)(U), (int)(R)))
1745 (__v32hi)(A), (__v32hf)_mm512_setzero_ph(), (__mmask32)(U), (int)(R)))
1750 (__v32hi)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)-1,
1755 _mm512_mask_cvtepi16_ph(__m512h __W, __mmask32 __U, __m512i __A) {
1757 (__v32hi)__A, (__v32hf)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1761 _mm512_maskz_cvtepi16_ph(__mmask32 __U, __m512i __A) {
1763 (__v32hi)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U,
1769 (__v32hf)(A), (__v32hu)_mm512_undefined_epi32(), (__mmask32)(-1), \
1774 (__mmask32)(U), (int)(R)))
1779 (__mmask32)(U), (int)(R)))
1784 (__v32hf)__A, (__v32hu)_mm512_setzero_epi32(), (__mmask32)-1,
1789 _mm512_mask_cvtph_epu16(__m512i __W, __mmask32 __U, __m512h __A) {
1791 (__v32hf)__A, (__v32hu)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1795 _mm512_maskz_cvtph_epu16(__mmask32 __U, __m512h __A) {
1797 (__v32hf)__A, (__v32hu)_mm512_setzero_epi32(), (__mmask32)__U,
1803 (__v32hf)(A), (__v32hu)_mm512_undefined_epi32(), (__mmask32)(-1), \
1808 (__mmask32)(U), (int)(R)))
1813 (__mmask32)(U), (int)(R)))
1818 (__v32hf)__A, (__v32hu)_mm512_setzero_epi32(), (__mmask32)-1,
1823 _mm512_mask_cvttph_epu16(__m512i __W, __mmask32 __U, __m512h __A) {
1825 (__v32hf)__A, (__v32hu)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1829 _mm512_maskz_cvttph_epu16(__mmask32 __U, __m512h __A) {
1831 (__v32hf)__A, (__v32hu)_mm512_setzero_epi32(), (__mmask32)__U,
1838 (__mmask32)(-1), (int)(R)))
1842 (__mmask32)(U), (int)(R)))
1846 (__v32hu)(A), (__v32hf)_mm512_setzero_ph(), (__mmask32)(U), (int)(R)))
1851 (__v32hu)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)-1,
1856 _mm512_mask_cvtepu16_ph(__m512h __W, __mmask32 __U, __m512i __A) {
1858 (__v32hu)__A, (__v32hf)__W, (__mmask32)__U, _MM_FROUND_CUR_DIRECTION);
1862 _mm512_maskz_cvtepu16_ph(__mmask32 __U, __m512i __A) {
1864 (__v32hu)__A, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U,
2447 (__mmask32)-1, (int)(R)))
2452 (__mmask32)(U), (int)(R)))
2457 (__mmask32)(U), (int)(R)))
2462 (__mmask32)(U), (int)(R)))
2467 (__mmask32)-1, (int)(R)))
2472 (__mmask32)(U), (int)(R)))
2477 (__mmask32)(U), (int)(R)))
2482 (__mmask32)-1, (int)(R)))
2487 (__mmask32)(U), (int)(R)))
2492 (__mmask32)(U), (int)(R)))
2497 (__mmask32)-1, (int)(R)))
2502 (__mmask32)(U), (int)(R)))
2508 (__v32hf)__C, (__mmask32)-1,
2513 _mm512_mask_fmadd_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {
2515 (__v32hf)__C, (__mmask32)__U,
2520 _mm512_mask3_fmadd_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {
2522 (__v32hf)__C, (__mmask32)__U,
2527 _mm512_maskz_fmadd_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {
2529 (__v32hf)__C, (__mmask32)__U,
2537 -(__v32hf)__C, (__mmask32)-1,
2542 _mm512_mask_fmsub_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {
2544 -(__v32hf)__C, (__mmask32)__U,
2549 _mm512_maskz_fmsub_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {
2551 (__v32hf)__A, (__v32hf)__B, -(__v32hf)__C, (__mmask32)__U,
2559 (__v32hf)__C, (__mmask32)-1,
2564 _mm512_mask3_fnmadd_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {
2566 (__v32hf)__C, (__mmask32)__U,
2571 _mm512_maskz_fnmadd_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {
2573 (__v32hf)__C, (__mmask32)__U,
2581 -(__v32hf)__C, (__mmask32)-1,
2586 _mm512_maskz_fnmsub_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {
2588 -(__v32hf)__A, (__v32hf)__B, -(__v32hf)__C, (__mmask32)__U,
2595 (__mmask32)-1, (int)(R)))
2600 (__mmask32)(U), (int)(R)))
2605 (__mmask32)(U), (int)(R)))
2610 (__mmask32)(U), (int)(R)))
2615 (__mmask32)-1, (int)(R)))
2620 (__mmask32)(U), (int)(R)))
2625 (__mmask32)(U), (int)(R)))
2630 (__v32hf)__A, (__v32hf)__B, (__v32hf)__C, (__mmask32)-1,
2635 _mm512_mask_fmaddsub_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {
2637 (__v32hf)__A, (__v32hf)__B, (__v32hf)__C, (__mmask32)__U,
2642 _mm512_mask3_fmaddsub_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {
2644 (__v32hf)__A, (__v32hf)__B, (__v32hf)__C, (__mmask32)__U,
2649 _mm512_maskz_fmaddsub_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {
2651 (__v32hf)__A, (__v32hf)__B, (__v32hf)__C, (__mmask32)__U,
2658 (__v32hf)__A, (__v32hf)__B, -(__v32hf)__C, (__mmask32)-1,
2663 _mm512_mask_fmsubadd_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {
2665 (__v32hf)__A, (__v32hf)__B, -(__v32hf)__C, (__mmask32)__U,
2670 _mm512_maskz_fmsubadd_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {
2672 (__v32hf)__A, (__v32hf)__B, -(__v32hf)__C, (__mmask32)__U,
2679 (__mmask32)(U), (int)(R)))
2682 _mm512_mask3_fmsub_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {
2684 (__v32hf)__C, (__mmask32)__U,
2691 (__mmask32)(U), (int)(R)))
2694 _mm512_mask3_fmsubadd_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {
2696 (__v32hf)__A, (__v32hf)__B, (__v32hf)__C, (__mmask32)__U,
2703 (__mmask32)(U), (int)(R)))
2706 _mm512_mask_fnmadd_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {
2708 (__v32hf)__C, (__mmask32)__U,
2715 (__mmask32)(U), (int)(R)))
2720 (__mmask32)(U), (int)(R)))
2723 _mm512_mask_fnmsub_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {
2725 -(__v32hf)__C, (__mmask32)__U,
2730 _mm512_mask3_fnmsub_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {
2732 (__v32hf)__C, (__mmask32)__U,
3289 _mm512_mask_blend_ph(__mmask32 __U, __m512h __A, __m512h __W) {
3290 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, (__v32hf)__W,