Lines Matching defs:__v16sf
19 typedef float __v16sf __attribute__((__vector_size__(64)));
828 return (__m512)((__v16sf)__a + (__v16sf)__b);
840 return (__m512)((__v16sf)__a * (__v16sf)__b);
852 return (__m512)((__v16sf)__a - (__v16sf)__b);
981 ((__m512)__builtin_ia32_maxps512((__v16sf)(__m512)(A), \
982 (__v16sf)(__m512)(B), (int)(R)))
986 (__v16sf)_mm512_max_round_ps((A), (B), (R)), \
987 (__v16sf)(W)))
991 (__v16sf)_mm512_max_round_ps((A), (B), (R)), \
992 (__v16sf)_mm512_setzero_ps()))
997 return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B,
1005 (__v16sf)_mm512_max_ps(__A, __B),
1006 (__v16sf)__W);
1013 (__v16sf)_mm512_max_ps(__A, __B),
1014 (__v16sf)_mm512_setzero_ps());
1216 ((__m512)__builtin_ia32_minps512((__v16sf)(__m512)(A), \
1217 (__v16sf)(__m512)(B), (int)(R)))
1221 (__v16sf)_mm512_min_round_ps((A), (B), (R)), \
1222 (__v16sf)(W)))
1226 (__v16sf)_mm512_min_round_ps((A), (B), (R)), \
1227 (__v16sf)_mm512_setzero_ps()))
1232 return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B,
1240 (__v16sf)_mm512_min_ps(__A, __B),
1241 (__v16sf)__W);
1248 (__v16sf)_mm512_min_ps(__A, __B),
1249 (__v16sf)_mm512_setzero_ps());
1528 ((__m512)__builtin_ia32_sqrtps512((__v16sf)(__m512)(A), (int)(R)))
1532 (__v16sf)_mm512_sqrt_round_ps((A), (R)), \
1533 (__v16sf)(__m512)(W)))
1537 (__v16sf)_mm512_sqrt_round_ps((A), (R)), \
1538 (__v16sf)_mm512_setzero_ps()))
1543 return (__m512)__builtin_ia32_sqrtps512((__v16sf)__A,
1551 (__v16sf)_mm512_sqrt_ps(__A),
1552 (__v16sf)__W);
1559 (__v16sf)_mm512_sqrt_ps(__A),
1560 (__v16sf)_mm512_setzero_ps());
1591 return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A,
1592 (__v16sf)
1600 return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A,
1601 (__v16sf) __W,
1608 return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A,
1609 (__v16sf)
1699 return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A,
1700 (__v16sf)
1708 return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A,
1709 (__v16sf) __W,
1716 return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A,
1717 (__v16sf)
1781 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1783 (__v16sf) __A, (unsigned short)-1,
1790 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1792 (__v16sf) __W, __U,
1817 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1819 (__v16sf) __W, __U,
1826 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1828 (__v16sf) __A, (unsigned short)-1,
1970 (__v16sf)_mm512_add_ps(__A, __B),
1971 (__v16sf)__W);
1977 (__v16sf)_mm512_add_ps(__A, __B),
1978 (__v16sf)_mm512_setzero_ps());
1996 ((__m512)__builtin_ia32_addps512((__v16sf)(__m512)(A), \
1997 (__v16sf)(__m512)(B), (int)(R)))
2001 (__v16sf)_mm512_add_round_ps((A), (B), (R)), \
2002 (__v16sf)(__m512)(W)))
2006 (__v16sf)_mm512_add_round_ps((A), (B), (R)), \
2007 (__v16sf)_mm512_setzero_ps()))
2085 (__v16sf)_mm512_sub_ps(__A, __B),
2086 (__v16sf)__W);
2092 (__v16sf)_mm512_sub_ps(__A, __B),
2093 (__v16sf)_mm512_setzero_ps());
2111 ((__m512)__builtin_ia32_subps512((__v16sf)(__m512)(A), \
2112 (__v16sf)(__m512)(B), (int)(R)))
2116 (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \
2117 (__v16sf)(__m512)(W)))
2121 (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \
2122 (__v16sf)_mm512_setzero_ps()))
2200 (__v16sf)_mm512_mul_ps(__A, __B),
2201 (__v16sf)__W);
2207 (__v16sf)_mm512_mul_ps(__A, __B),
2208 (__v16sf)_mm512_setzero_ps());
2226 ((__m512)__builtin_ia32_mulps512((__v16sf)(__m512)(A), \
2227 (__v16sf)(__m512)(B), (int)(R)))
2231 (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \
2232 (__v16sf)(__m512)(W)))
2236 (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \
2237 (__v16sf)_mm512_setzero_ps()))
2322 return (__m512)((__v16sf)__a/(__v16sf)__b);
2328 (__v16sf)_mm512_div_ps(__A, __B),
2329 (__v16sf)__W);
2335 (__v16sf)_mm512_div_ps(__A, __B),
2336 (__v16sf)_mm512_setzero_ps());
2354 ((__m512)__builtin_ia32_divps512((__v16sf)(__m512)(A), \
2355 (__v16sf)(__m512)(B), (int)(R)))
2359 (__v16sf)_mm512_div_round_ps((A), (B), (R)), \
2360 (__v16sf)(__m512)(W)))
2364 (__v16sf)_mm512_div_round_ps((A), (B), (R)), \
2365 (__v16sf)_mm512_setzero_ps()))
2368 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(B), \
2369 (__v16sf)_mm512_undefined_ps(), \
2374 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(C), (int)(imm), \
2375 (__v16sf)(__m512)(A), (__mmask16)(B), \
2379 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(B), (int)(imm), \
2380 (__v16sf)_mm512_setzero_ps(), \
2385 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(C), (int)(imm), \
2386 (__v16sf)(__m512)(A), (__mmask16)(B), \
2390 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(B), (int)(imm), \
2391 (__v16sf)_mm512_setzero_ps(), \
2395 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(imm), \
2396 (__v16sf)_mm512_undefined_ps(), \
2636 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2637 (__v16sf)(__m512)(B), \
2638 (__v16sf)(__m512)(C), \
2643 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2644 (__v16sf)(__m512)(B), \
2645 (__v16sf)(__m512)(C), \
2650 ((__m512)__builtin_ia32_vfmaddps512_mask3((__v16sf)(__m512)(A), \
2651 (__v16sf)(__m512)(B), \
2652 (__v16sf)(__m512)(C), \
2657 ((__m512)__builtin_ia32_vfmaddps512_maskz((__v16sf)(__m512)(A), \
2658 (__v16sf)(__m512)(B), \
2659 (__v16sf)(__m512)(C), \
2664 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2665 (__v16sf)(__m512)(B), \
2666 -(__v16sf)(__m512)(C), \
2671 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2672 (__v16sf)(__m512)(B), \
2673 -(__v16sf)(__m512)(C), \
2678 ((__m512)__builtin_ia32_vfmaddps512_maskz((__v16sf)(__m512)(A), \
2679 (__v16sf)(__m512)(B), \
2680 -(__v16sf)(__m512)(C), \
2685 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2686 -(__v16sf)(__m512)(B), \
2687 (__v16sf)(__m512)(C), \
2692 ((__m512)__builtin_ia32_vfmaddps512_mask3(-(__v16sf)(__m512)(A), \
2693 (__v16sf)(__m512)(B), \
2694 (__v16sf)(__m512)(C), \
2699 ((__m512)__builtin_ia32_vfmaddps512_maskz(-(__v16sf)(__m512)(A), \
2700 (__v16sf)(__m512)(B), \
2701 (__v16sf)(__m512)(C), \
2706 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
2707 -(__v16sf)(__m512)(B), \
2708 -(__v16sf)(__m512)(C), \
2713 ((__m512)__builtin_ia32_vfmaddps512_maskz(-(__v16sf)(__m512)(A), \
2714 (__v16sf)(__m512)(B), \
2715 -(__v16sf)(__m512)(C), \
2722 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2723 (__v16sf) __B,
2724 (__v16sf) __C,
2732 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2733 (__v16sf) __B,
2734 (__v16sf) __C,
2742 return (__m512) __builtin_ia32_vfmaddps512_mask3 ((__v16sf) __A,
2743 (__v16sf) __B,
2744 (__v16sf) __C,
2752 return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A,
2753 (__v16sf) __B,
2754 (__v16sf) __C,
2762 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2763 (__v16sf) __B,
2764 -(__v16sf) __C,
2772 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2773 (__v16sf) __B,
2774 -(__v16sf) __C,
2782 return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A,
2783 (__v16sf) __B,
2784 -(__v16sf) __C,
2792 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2793 -(__v16sf) __B,
2794 (__v16sf) __C,
2802 return (__m512) __builtin_ia32_vfmaddps512_mask3 (-(__v16sf) __A,
2803 (__v16sf) __B,
2804 (__v16sf) __C,
2812 return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A,
2813 (__v16sf) __B,
2814 (__v16sf) __C,
2822 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
2823 -(__v16sf) __B,
2824 -(__v16sf) __C,
2832 return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A,
2833 (__v16sf) __B,
2834 -(__v16sf) __C,
2959 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2960 (__v16sf)(__m512)(B), \
2961 (__v16sf)(__m512)(C), \
2966 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2967 (__v16sf)(__m512)(B), \
2968 (__v16sf)(__m512)(C), \
2973 ((__m512)__builtin_ia32_vfmaddsubps512_mask3((__v16sf)(__m512)(A), \
2974 (__v16sf)(__m512)(B), \
2975 (__v16sf)(__m512)(C), \
2980 ((__m512)__builtin_ia32_vfmaddsubps512_maskz((__v16sf)(__m512)(A), \
2981 (__v16sf)(__m512)(B), \
2982 (__v16sf)(__m512)(C), \
2987 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2988 (__v16sf)(__m512)(B), \
2989 -(__v16sf)(__m512)(C), \
2994 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \
2995 (__v16sf)(__m512)(B), \
2996 -(__v16sf)(__m512)(C), \
3001 ((__m512)__builtin_ia32_vfmaddsubps512_maskz((__v16sf)(__m512)(A), \
3002 (__v16sf)(__m512)(B), \
3003 -(__v16sf)(__m512)(C), \
3010 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3011 (__v16sf) __B,
3012 (__v16sf) __C,
3020 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3021 (__v16sf) __B,
3022 (__v16sf) __C,
3030 return (__m512) __builtin_ia32_vfmaddsubps512_mask3 ((__v16sf) __A,
3031 (__v16sf) __B,
3032 (__v16sf) __C,
3040 return (__m512) __builtin_ia32_vfmaddsubps512_maskz ((__v16sf) __A,
3041 (__v16sf) __B,
3042 (__v16sf) __C,
3050 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3051 (__v16sf) __B,
3052 -(__v16sf) __C,
3060 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A,
3061 (__v16sf) __B,
3062 -(__v16sf) __C,
3070 return (__m512) __builtin_ia32_vfmaddsubps512_maskz ((__v16sf) __A,
3071 (__v16sf) __B,
3072 -(__v16sf) __C,
3095 ((__m512)__builtin_ia32_vfmsubps512_mask3((__v16sf)(__m512)(A), \
3096 (__v16sf)(__m512)(B), \
3097 (__v16sf)(__m512)(C), \
3103 return (__m512)__builtin_ia32_vfmsubps512_mask3 ((__v16sf) __A,
3104 (__v16sf) __B,
3105 (__v16sf) __C,
3128 ((__m512)__builtin_ia32_vfmsubaddps512_mask3((__v16sf)(__m512)(A), \
3129 (__v16sf)(__m512)(B), \
3130 (__v16sf)(__m512)(C), \
3137 return (__m512)__builtin_ia32_vfmsubaddps512_mask3 ((__v16sf) __A,
3138 (__v16sf) __B,
3139 (__v16sf) __C,
3162 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
3163 -(__v16sf)(__m512)(B), \
3164 (__v16sf)(__m512)(C), \
3171 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
3172 -(__v16sf) __B,
3173 (__v16sf) __C,
3213 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
3214 -(__v16sf)(__m512)(B), \
3215 -(__v16sf)(__m512)(C), \
3220 ((__m512)__builtin_ia32_vfmsubps512_mask3(-(__v16sf)(__m512)(A), \
3221 (__v16sf)(__m512)(B), \
3222 (__v16sf)(__m512)(C), \
3229 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
3230 -(__v16sf) __B,
3231 -(__v16sf) __C,
3239 return (__m512) __builtin_ia32_vfmsubps512_mask3 (-(__v16sf) __A,
3240 (__v16sf) __B,
3241 (__v16sf) __C,
3363 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \
3368 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \
3373 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \
3391 (__v16sf) __W,
3392 (__v16sf) __A);
3414 ((__mmask16)__builtin_ia32_cmpps512_mask((__v16sf)(__m512)(A), \
3415 (__v16sf)(__m512)(B), (int)(P), \
3419 ((__mmask16)__builtin_ia32_cmpps512_mask((__v16sf)(__m512)(A), \
3420 (__v16sf)(__m512)(B), (int)(P), \
3526 ((__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \
3531 ((__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \
3536 ((__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \
3544 return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
3554 return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
3563 return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
3571 (__v16sf)_mm512_setzero_ps(), \
3576 (__v16sf)(__m512)(W), \
3581 (__v16sf)_mm512_setzero_ps(), \
3586 (__v16sf)_mm512_setzero_ps(), \
3591 (__v16sf)(__m512)(W), \
3596 (__v16sf)_mm512_setzero_ps(), \
3602 return (__m512)__builtin_convertvector((__v16su)__A, __v16sf);
3609 (__v16sf)_mm512_cvtepu32_ps(__A),
3610 (__v16sf)__W);
3617 (__v16sf)_mm512_cvtepu32_ps(__A),
3618 (__v16sf)_mm512_setzero_ps());
3658 return (__m512)__builtin_convertvector((__v16si)__A, __v16sf);
3665 (__v16sf)_mm512_cvtepi32_ps(__A),
3666 (__v16sf)__W);
3673 (__v16sf)_mm512_cvtepi32_ps(__A),
3674 (__v16sf)_mm512_setzero_ps());
3772 ((__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3777 ((__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3782 ((__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \
3792 (__v16sf)_mm512_undefined_ps(), \
3797 (__v16sf)(__m512)(W), \
3802 (__v16sf)_mm512_setzero_ps(), \
3810 (__v16sf)
3820 (__v16sf) __W,
3829 (__v16sf) _mm512_setzero_ps (),
3877 ((__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \
3882 ((__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \
3887 ((__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \
3895 __builtin_ia32_cvttps2dq512_mask((__v16sf) __a,
3903 return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
3912 return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
3919 ((__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \
3924 ((__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \
3929 ((__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \
3936 return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
3945 return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
3954 return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
4006 ((__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \
4011 ((__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \
4016 ((__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \
4023 return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,\
4033 return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
4042 return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
4156 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,
4167 (__v16sf)_mm512_unpackhi_ps(__A, __B),
4168 (__v16sf)__W);
4175 (__v16sf)_mm512_unpackhi_ps(__A, __B),
4176 (__v16sf)_mm512_setzero_ps());
4182 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,
4193 (__v16sf)_mm512_unpacklo_ps(__A, __B),
4194 (__v16sf)__W);
4201 (__v16sf)_mm512_unpacklo_ps(__A, __B),
4202 (__v16sf)_mm512_setzero_ps());
4372 (__v16sf) __W,
4380 (__v16sf)
4429 return (__m512) __builtin_ia32_loadaps512_mask ((const __v16sf *) __P,
4430 (__v16sf) __W,
4437 return (__m512) __builtin_ia32_loadaps512_mask ((const __v16sf *)__P,
4438 (__v16sf)
4545 __builtin_ia32_storeups512_mask ((float *)__P, (__v16sf) __A,
4573 __builtin_ia32_storeaps512_mask ((__v16sf *)__P, (__v16sf) __A,
5351 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5352 (__v16sf)(__m512)(B), \
5357 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5358 (__v16sf)(__m512)(B), \
5363 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5364 (__v16sf)(__m512)(B), \
5370 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \
5371 (__v16sf)(__m512)(B), \
5377 ((__m512)__builtin_ia32_fixupimmps512_maskz((__v16sf)(__m512)(A), \
5378 (__v16sf)(__m512)(B), \
5384 ((__m512)__builtin_ia32_fixupimmps512_maskz((__v16sf)(__m512)(A), \
5385 (__v16sf)(__m512)(B), \
6162 ((__m512)__builtin_ia32_vpermilps512((__v16sf)(__m512)(X), (int)(C)))
6166 (__v16sf)_mm512_permute_ps((X), (C)), \
6167 (__v16sf)(__m512)(W)))
6171 (__v16sf)_mm512_permute_ps((X), (C)), \
6172 (__v16sf)_mm512_setzero_ps()))
6199 return (__m512)__builtin_ia32_vpermilvarps512((__v16sf)__A, (__v16si)__C);
6206 (__v16sf)_mm512_permutevar_ps(__A, __C),
6207 (__v16sf)__W);
6214 (__v16sf)_mm512_permutevar_ps(__A, __C),
6215 (__v16sf)_mm512_setzero_ps());
6254 return (__m512)__builtin_ia32_vpermi2varps512((__v16sf)__A, (__v16si)__I,
6255 (__v16sf) __B);
6262 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),
6263 (__v16sf)__A);
6270 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),
6271 (__v16sf)(__m512)__I);
6278 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),
6279 (__v16sf)_mm512_setzero_ps());
6462 ((__m512)__builtin_ia32_scalefps512_mask((__v16sf)(__m512)(A), \
6463 (__v16sf)(__m512)(B), \
6464 (__v16sf)_mm512_undefined_ps(), \
6468 ((__m512)__builtin_ia32_scalefps512_mask((__v16sf)(__m512)(A), \
6469 (__v16sf)(__m512)(B), \
6470 (__v16sf)(__m512)(W), \
6474 ((__m512)__builtin_ia32_scalefps512_mask((__v16sf)(__m512)(A), \
6475 (__v16sf)(__m512)(B), \
6476 (__v16sf)_mm512_setzero_ps(), \
6482 return (__m512) __builtin_ia32_scalefps512_mask ((__v16sf) __A,
6483 (__v16sf) __B,
6484 (__v16sf)
6493 return (__m512) __builtin_ia32_scalefps512_mask ((__v16sf) __A,
6494 (__v16sf) __B,
6495 (__v16sf) __W,
6503 return (__m512) __builtin_ia32_scalefps512_mask ((__v16sf) __A,
6504 (__v16sf) __B,
6505 (__v16sf)
6652 ((__m512)__builtin_ia32_shuf_f32x4((__v16sf)(__m512)(A), \
6653 (__v16sf)(__m512)(B), (int)(imm)))
6657 (__v16sf)_mm512_shuffle_f32x4((A), (B), (imm)), \
6658 (__v16sf)(__m512)(W)))
6662 (__v16sf)_mm512_shuffle_f32x4((A), (B), (imm)), \
6663 (__v16sf)_mm512_setzero_ps()))
6722 ((__m512)__builtin_ia32_shufps512((__v16sf)(__m512)(A), \
6723 (__v16sf)(__m512)(B), (int)(M)))
6727 (__v16sf)_mm512_shuffle_ps((A), (B), (M)), \
6728 (__v16sf)(__m512)(W)))
6732 (__v16sf)_mm512_shuffle_ps((A), (B), (M)), \
6733 (__v16sf)_mm512_setzero_ps()))
6823 (__v16sf)_mm512_broadcast_f32x4(__A),
6824 (__v16sf)__O);
6831 (__v16sf)_mm512_broadcast_f32x4(__A),
6832 (__v16sf)_mm512_setzero_ps());
6925 (__v16sf) _mm512_broadcastss_ps(__A),
6926 (__v16sf) __O);
6933 (__v16sf) _mm512_broadcastss_ps(__A),
6934 (__v16sf) _mm512_setzero_ps());
7434 ((__m512)__builtin_ia32_insertf32x4((__v16sf)(__m512)(A), \
7439 (__v16sf)_mm512_insertf32x4((A), (B), (imm)), \
7440 (__v16sf)(__m512)(W)))
7444 (__v16sf)_mm512_insertf32x4((A), (B), (imm)), \
7445 (__v16sf)_mm512_setzero_ps()))
7501 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \
7503 (__v16sf)_mm512_undefined_ps(), \
7507 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \
7509 (__v16sf)(__m512)(W), \
7513 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \
7515 (__v16sf)_mm512_setzero_ps(), \
7519 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \
7521 (__v16sf)_mm512_undefined_ps(), \
7526 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \
7528 (__v16sf)(__m512)(W), \
7533 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \
7535 (__v16sf)_mm512_setzero_ps(), \
7582 ((__m512)__builtin_ia32_getexpps512_mask((__v16sf)(__m512)(A), \
7583 (__v16sf)_mm512_undefined_ps(), \
7587 ((__m512)__builtin_ia32_getexpps512_mask((__v16sf)(__m512)(A), \
7588 (__v16sf)(__m512)(W), \
7592 ((__m512)__builtin_ia32_getexpps512_mask((__v16sf)(__m512)(A), \
7593 (__v16sf)_mm512_setzero_ps(), \
7599 return (__m512) __builtin_ia32_getexpps512_mask ((__v16sf) __A,
7600 (__v16sf) _mm512_undefined_ps (),
7608 return (__m512) __builtin_ia32_getexpps512_mask ((__v16sf) __A,
7609 (__v16sf) __W,
7617 return (__m512) __builtin_ia32_getexpps512_mask ((__v16sf) __A,
7618 (__v16sf) _mm512_setzero_ps (),
7672 ((__m512)__builtin_ia32_gathersiv16sf((__v16sf)_mm512_undefined_ps(), \
7678 ((__m512)__builtin_ia32_gathersiv16sf((__v16sf)(__m512)(v1_old), \
7762 (__v16sf)(__m512)(v1), (int)(scale))
7767 (__v16sf)(__m512)(v1), (int)(scale))
8306 return (__m512)__builtin_ia32_permvarsf512((__v16sf)__Y, (__v16si)__X);
8313 (__v16sf)_mm512_permutexvar_ps(__X, __Y),
8314 (__v16sf)__W);
8321 (__v16sf)_mm512_permutexvar_ps(__X, __Y),
8322 (__v16sf)_mm512_setzero_ps());
8475 typedef __v16sf __v16sf_aligned __attribute__((aligned(64)));
8516 return (__m512) __builtin_ia32_compresssf512_mask ((__v16sf) __A,
8517 (__v16sf) __W,
8524 return (__m512) __builtin_ia32_compresssf512_mask ((__v16sf) __A,
8525 (__v16sf)
8652 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A,
8660 (__v16sf)_mm512_movehdup_ps(__A),
8661 (__v16sf)__W);
8668 (__v16sf)_mm512_movehdup_ps(__A),
8669 (__v16sf)_mm512_setzero_ps());
8675 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A,
8683 (__v16sf)_mm512_moveldup_ps(__A),
8684 (__v16sf)__W);
8691 (__v16sf)_mm512_moveldup_ps(__A),
8692 (__v16sf)_mm512_setzero_ps());
8849 return (__m512) __builtin_ia32_expandloadsf512_mask ((const __v16sf *)__P,
8850 (__v16sf) __W,
8857 return (__m512) __builtin_ia32_expandloadsf512_mask ((const __v16sf *)__P,
8858 (__v16sf) _mm512_setzero_ps(),
8881 return (__m512) __builtin_ia32_expandsf512_mask ((__v16sf) __A,
8882 (__v16sf) __W,
8889 return (__m512) __builtin_ia32_expandsf512_mask ((__v16sf) __A,
8890 (__v16sf) _mm512_setzero_ps(),
8979 (__v16sf) __A,
8980 (__v16sf) __W);
8987 (__v16sf) __A,
8988 (__v16sf) _mm512_setzero_ps ());
9008 __builtin_ia32_compressstoresf512_mask ((__v16sf *) __P, (__v16sf) __A,