gcc/gcc/local-alloc.c

67 #include "hard-reg-set.h"
110      is a set of consecutive insns.  -1 if death has not been recorded.  */
170    The former register set is given priority for allocation.  This tends to
173 /* Element Q is a set of hard registers that are suggested for quantity Q by
178 /* Element Q is a set of hard registers that are suggested for quantity Q by
222    This is set up as a result of register allocation.
234 /* Each set of hard registers indicates registers live at a particular
409 	 for the previous block; it is set to the entire array before
412 	 explicit set by `alloc_qty'.  */
465 validate_equiv_mem_from_store (rtx dest, rtx set ATTRIBUTE_UNUSED,
790    compilation (either because they can be referenced in memory or are set once
817      a register can be set below its use.  */
827 	  rtx set;
838 	  set = single_set (insn);
842 	  if (set == 0)
854 		  if (part != set)
859 	  dest = SET_DEST (set);
860 	  src = SET_SRC (set);
886 	  /* We only handle the case of a pseudo register being set
889 	     values that need an ADDRESS_REGS register and set them equivalent
895 	     preferred class of a pseudo depends on all instructions that set
905 		 also set somewhere else to a constant.  */
906 	      note_stores (set, no_equiv, NULL);
930 	      no_equiv (dest, set, NULL);
960 	      && MEM_P (SET_SRC (set))
961 	      && validate_equiv_mem (insn, dest, SET_SRC (set)))
962 	    REG_NOTES (insn) = note = gen_rtx_EXPR_LIST (REG_EQUIV, SET_SRC (set),
988 	      reg_equiv[regno].src_p = &SET_SRC (set);
999 		     set once and used once, indicate that the reference may be
1026       rtx set, src, dest;
1032       set = single_set (insn);
1033       if (! set)
1036       dest = SET_DEST (set);
1037       src = SET_SRC (set);
1042 	 insn that set REG is safe.  If so, put a REG_EQUIV note on the
1048 	 If one of the regs in the address has reg_equiv[REGNO].replace set,
1050 	 optimization may move the set of this register immediately before
1118 		  /* reg_equiv[REGNO].replace gets set only when
1119 		     REG_N_REFS[REGNO] is 2, i.e. the register is set
1120 		     once and used once.  (If it were only set, but not used,
1335 	  rtx link, set;
1363 	     If tying is done, WIN is set nonzero.  */
1470 	      && (set = single_set (XEXP (link, 0))) != 0
1471 	      && SET_DEST (set) == r0 && SET_SRC (set) == r0
1499 	  /* If registers were just tied, set COMBINED_REGNO
1501 	     that was tied to the register set in this insn.
1524 	     that are born (set) in this instruction.
1529 	  /* If anything is set in this insn and then unused, mark it as dying
2037       /* If SREG's reg class is smaller, set qty[SQTY].min_class.  */
2093    REG is whatever is set or clobbered.  SETTER is the rtx that
2174      REG to the same hard register as an unused output we could set the hard
2182 	  rtx set = XVECEXP (PATTERN (this_insn), 0, i);
2183 	  if (GET_CODE (set) == SET
2184 	      && !REG_P (SET_DEST (set))
2185 	      && !rtx_equal_p (reg, SET_DEST (set))
2186 	      && reg_overlap_mentioned_p (reg, SET_DEST (set)))