Lines Matching refs:d32rxregs
43 #define d32rxregs dregs.d32_u.rxregs_32
487 di->d32rxregs = (dma32regs_t *)dmaregsrx;
564 &di->d32rxregs->control) & RC_BL_MASK) >> RC_BL_SHIFT;
566 &di->d32rxregs->control) & RC_PC_MASK) >> RC_PC_SHIFT;
568 &di->d32rxregs->control) & RC_PT_MASK) >> RC_PT_SHIFT;
964 else if (di->d32rxregs)
965 return (_dma32_addrext(di->osh, di->d32rxregs));
1028 W_REG(di->osh, &di->d32rxregs->addr, (PHYSADDRLO(pa) +
1044 W_REG(di->osh, &di->d32rxregs->addr, (PHYSADDRLO(pa) +
1046 SET_REG(di->osh, &di->d32rxregs->control, RC_AE, ae <<RC_AE_SHIFT);
1138 uint32 control = (R_REG(di->osh, &di->d32rxregs->control) & RC_AE) | RC_RE;
1159 W_REG(di->osh, &di->d32rxregs->control,
1417 W_REG(di->osh, &di->d32rxregs->ptr, I2B(rxout, dma32dd_t));
1528 end = (uint16)B2I(R_REG(di->osh, &di->d32rxregs->status) & RS_CD_MASK, dma32dd_t);
1821 R_REG(di->osh, &di->d32rxregs->control),
1822 R_REG(di->osh, &di->d32rxregs->addr),
1823 R_REG(di->osh, &di->d32rxregs->ptr),
1824 R_REG(di->osh, &di->d32rxregs->status));
2035 return ((R_REG(di->osh, &di->d32rxregs->status) & RS_RS_MASK) == RS_RS_STOPPED);
2137 return ((R_REG(di->osh, &di->d32rxregs->status) & RS_CD_MASK) ==
2138 R_REG(di->osh, &di->d32rxregs->ptr));
2149 W_REG(di->osh, &di->d32rxregs->control, 0);
2151 &di->d32rxregs->status) & RS_RS_MASK)) != RS_RS_DISABLED),
2162 rc = R_REG(di->osh, &di->d32rxregs->control);
2413 curr = (uint16)B2I(R_REG(di->osh, &di->d32rxregs->status) & RS_CD_MASK, dma32dd_t);