Lines Matching defs:dbri
7 * Based entirely upon drivers/sbus/audio/dbri.c which is:
307 void __iomem *regs; /* dbri HW regs */
570 #define DBRI_STREAM(dbri, substream) &dbri->stream_info[DBRI_STREAMNO(substream)]
625 dbri->dma->cmd buffer. After this, the commands can be written to
635 static void dbri_cmdwait(struct snd_dbri *dbri)
641 spin_lock_irqsave(&dbri->lock, flags);
642 while ((--maxloops) > 0 && (sbus_readl(dbri->regs + REG0) & D_P)) {
643 spin_unlock_irqrestore(&dbri->lock, flags);
645 spin_lock_irqsave(&dbri->lock, flags);
647 spin_unlock_irqrestore(&dbri->lock, flags);
660 static s32 *dbri_cmdlock(struct snd_dbri * dbri, int len)
664 spin_lock(&dbri->cmdlock);
665 if (dbri->cmdptr - dbri->dma->cmd + len < DBRI_NO_CMDS - 2)
666 return dbri->cmdptr + 2;
667 else if (len < sbus_readl(dbri->regs + REG8) - dbri->dma_dvma)
668 return dbri->dma->cmd;
683 static void dbri_cmdsend(struct snd_dbri * dbri, s32 * cmd,int len)
694 addr = dbri->dma_dvma + (cmd - len - dbri->dma->cmd) * sizeof(s32);
695 *(dbri->cmdptr+1) = addr;
696 *(dbri->cmdptr) = DBRI_CMD(D_JUMP, 0, 0);
699 if (cmd > dbri->cmdptr) {
702 for (ptr = dbri->cmdptr; ptr < cmd+2; ptr++)
705 s32 *ptr = dbri->cmdptr;
710 for (ptr = dbri->dma->cmd; ptr < cmd+2; ptr++) {
717 tmp = sbus_readl(dbri->regs + REG0);
719 sbus_writel(tmp, dbri->regs + REG0);
721 dbri->cmdptr = cmd;
722 spin_unlock(&dbri->cmdlock);
726 static void dbri_reset(struct snd_dbri * dbri)
732 sbus_readl(dbri->regs + REG0),
733 sbus_readl(dbri->regs + REG2),
734 sbus_readl(dbri->regs + REG8), sbus_readl(dbri->regs + REG9));
736 sbus_writel(D_R, dbri->regs + REG0); /* Soft Reset */
737 for (i = 0; (sbus_readl(dbri->regs + REG0) & D_R) && i < 64; i++)
742 tmp = sbus_readl(dbri->regs + REG0);
745 sbus_writel(tmp, dbri->regs + REG0);
749 static void dbri_initialize(struct snd_dbri * dbri)
756 spin_lock_irqsave(&dbri->lock, flags);
758 dbri_reset(dbri);
762 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1;
764 spin_lock_init(&dbri->cmdlock);
768 dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0);
769 dbri->dma->intr[0] = dma_addr;
770 dbri->dbri_irqp = 1;
774 spin_lock(&dbri->cmdlock);
775 cmd = dbri->cmdptr = dbri->dma->cmd;
779 dbri->cmdptr = cmd;
782 dma_addr = dbri->dma_dvma + dbri_dma_off(cmd, 0);
783 sbus_writel(dma_addr, dbri->regs + REG8);
784 spin_unlock(&dbri->cmdlock);
786 spin_unlock_irqrestore(&dbri->lock, flags);
787 dbri_cmdwait(dbri);
804 static int pipe_active(struct snd_dbri * dbri, int pipe)
806 return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1));
809 /* reset_pipe(dbri, pipe)
814 static void reset_pipe(struct snd_dbri * dbri, int pipe)
825 sdp = dbri->pipes[pipe].sdp;
831 cmd = dbri_cmdlock(dbri, 3);
835 dbri_cmdsend(dbri, cmd, 3);
837 desc = dbri->pipes[pipe].first_desc;
840 dbri->dma->desc[desc].nda = dbri->dma->desc[desc].ba = 0;
841 desc = dbri->next_desc[desc];
842 } while (desc != -1 && desc != dbri->pipes[pipe].first_desc);
844 dbri->pipes[pipe].desc = -1;
845 dbri->pipes[pipe].first_desc = -1;
851 static void setup_pipe(struct snd_dbri * dbri, int pipe, int sdp)
870 dbri->pipes[pipe].sdp = sdp;
871 dbri->pipes[pipe].desc = -1;
872 dbri->pipes[pipe].first_desc = -1;
874 reset_pipe(dbri, pipe);
880 static void link_time_slot(struct snd_dbri * dbri, int pipe,
895 if (dbri->pipes[pipe].sdp == 0
896 || dbri->pipes[prevpipe].sdp == 0
897 || dbri->pipes[nextpipe].sdp == 0) {
902 dbri->pipes[prevpipe].nextpipe = pipe;
903 dbri->pipes[pipe].nextpipe = nextpipe;
904 dbri->pipes[pipe].length = length;
906 cmd = dbri_cmdlock(dbri, 4);
908 if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) {
915 cycle = dbri->chi_bpf;
931 dbri_cmdsend(dbri, cmd, 4);
951 static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data)
961 if (D_SDP_MODE(dbri->pipes[pipe].sdp) == 0) {
966 if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) {
971 if (!(dbri->pipes[pipe].sdp & D_SDP_TO_SER)) {
978 if (dbri->pipes[pipe].sdp & D_SDP_MSB)
979 data = reverse_bytes(data, dbri->pipes[pipe].length);
981 cmd = dbri_cmdlock(dbri, 3);
987 spin_lock_irqsave(&dbri->lock, flags);
988 dbri_cmdsend(dbri, cmd, 3);
989 spin_unlock_irqrestore(&dbri->lock, flags);
990 dbri_cmdwait(dbri);
994 static void recv_fixed(struct snd_dbri * dbri, int pipe, volatile __u32 * ptr)
1001 if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) {
1006 if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) {
1011 dbri->pipes[pipe].recv_fixed_ptr = ptr;
1030 static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period)
1032 struct dbri_streaminfo *info = &dbri->stream_info[streamno];
1044 if (dbri->pipes[info->pipe].sdp == 0) {
1054 if (!(dbri->pipes[info->pipe].sdp & D_SDP_TO_SER)) {
1060 if (dbri->pipes[info->pipe].sdp & D_SDP_TO_SER) {
1067 if (pipe_active(dbri, info->pipe)) {
1078 desc = dbri->pipes[info->pipe].first_desc;
1081 dbri->dma->desc[desc].nda = dbri->dma->desc[desc].ba = 0;
1082 desc = dbri->next_desc[desc];
1083 } while (desc != -1 && desc != dbri->pipes[info->pipe].first_desc);
1085 dbri->pipes[info->pipe].desc = -1;
1086 dbri->pipes[info->pipe].first_desc = -1;
1093 if (!dbri->dma->desc[desc].ba)
1109 dbri->next_desc[desc] = -1;
1110 dbri->dma->desc[desc].ba = dvma_buffer;
1111 dbri->dma->desc[desc].nda = 0;
1114 dbri->dma->desc[desc].word1 = DBRI_TD_CNT(mylen);
1115 dbri->dma->desc[desc].word4 = 0;
1116 dbri->dma->desc[desc].word1 |=
1119 dbri->dma->desc[desc].word1 = 0;
1120 dbri->dma->desc[desc].word4 =
1127 dbri->next_desc[last_desc] = desc;
1128 dbri->dma->desc[last_desc].nda =
1129 dbri->dma_dvma + dbri_dma_off(desc, desc);
1142 dbri->dma->desc[last_desc].nda =
1143 dbri->dma_dvma + dbri_dma_off(desc, first_desc);
1144 dbri->next_desc[last_desc] = first_desc;
1145 dbri->pipes[info->pipe].first_desc = first_desc;
1146 dbri->pipes[info->pipe].desc = first_desc;
1152 dbri->dma->desc[desc].word1,
1153 dbri->dma->desc[desc].ba,
1154 dbri->dma->desc[desc].nda, dbri->dma->desc[desc].word4);
1155 desc = dbri->next_desc[desc];
1179 static void reset_chi(struct snd_dbri * dbri, enum master_or_slave master_or_slave,
1187 cmd = dbri_cmdlock(dbri, 4);
1194 dbri_cmdsend(dbri, cmd, 4);
1196 dbri->pipes[16].sdp = 1;
1197 dbri->pipes[16].nextpipe = 16;
1199 cmd = dbri_cmdlock(dbri, 4);
1226 dbri->chi_bpf = bits_per_frame;
1240 dbri_cmdsend(dbri, cmd, 4);
1254 static void cs4215_setup_pipes(struct snd_dbri * dbri)
1258 spin_lock_irqsave(&dbri->lock, flags);
1274 setup_pipe(dbri, 4, D_SDP_MEM | D_SDP_TO_SER | D_SDP_MSB);
1275 setup_pipe(dbri, 20, D_SDP_FIXED | D_SDP_TO_SER | D_SDP_MSB);
1276 setup_pipe(dbri, 6, D_SDP_MEM | D_SDP_FROM_SER | D_SDP_MSB);
1277 setup_pipe(dbri, 21, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);
1279 setup_pipe(dbri, 17, D_SDP_FIXED | D_SDP_TO_SER | D_SDP_MSB);
1280 setup_pipe(dbri, 18, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);
1281 setup_pipe(dbri, 19, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);
1282 spin_unlock_irqrestore(&dbri->lock, flags);
1284 dbri_cmdwait(dbri);
1321 static void cs4215_setdata(struct snd_dbri * dbri, int muted)
1324 dbri->mm.data[0] |= 63;
1325 dbri->mm.data[1] |= 63;
1326 dbri->mm.data[2] &= ~15;
1327 dbri->mm.data[3] &= ~15;
1330 struct dbri_streaminfo *info = &dbri->stream_info[DBRI_PLAY];
1334 dbri->mm.data[0] &= ~0x3f; /* Reset the volume bits */
1335 dbri->mm.data[1] &= ~0x3f;
1336 dbri->mm.data[0] |= (DBRI_MAX_VOLUME - left_gain);
1337 dbri->mm.data[1] |= (DBRI_MAX_VOLUME - right_gain);
1340 info = &dbri->stream_info[DBRI_REC];
1343 dbri->mm.data[2] |= CS4215_LG(left_gain);
1344 dbri->mm.data[3] |= CS4215_RG(right_gain);
1347 xmit_fixed(dbri, 20, *(int *)dbri->mm.data);
1353 static void cs4215_open(struct snd_dbri * dbri)
1360 dbri->mm.channels, dbri->mm.precision);
1366 cs4215_setdata(dbri, 1);
1382 spin_lock_irqsave(&dbri->lock, flags);
1383 tmp = sbus_readl(dbri->regs + REG0);
1385 sbus_writel(tmp, dbri->regs + REG0);
1389 (dbri->mm.onboard ? D_PIO0 : D_PIO2), dbri->regs + REG2);
1391 reset_chi(dbri, CHIslave, 128);
1399 data_width = dbri->mm.channels * dbri->mm.precision;
1401 link_time_slot(dbri, 4, 16, 16, data_width, dbri->mm.offset);
1402 link_time_slot(dbri, 20, 4, 16, 32, dbri->mm.offset + 32);
1403 link_time_slot(dbri, 6, 16, 16, data_width, dbri->mm.offset);
1404 link_time_slot(dbri, 21, 6, 16, 16, dbri->mm.offset + 40);
1406 tmp = sbus_readl(dbri->regs + REG0);
1408 sbus_writel(tmp, dbri->regs + REG0);
1409 spin_unlock_irqrestore(&dbri->lock, flags);
1411 cs4215_setdata(dbri, 0);
1417 static int cs4215_setctrl(struct snd_dbri * dbri)
1427 cs4215_setdata(dbri, 1);
1434 val = D_ENPIO | D_PIO1 | (dbri->mm.onboard ? D_PIO0 : D_PIO2);
1435 sbus_writel(val, dbri->regs + REG2);
1457 spin_lock_irqsave(&dbri->lock, flags);
1458 tmp = sbus_readl(dbri->regs + REG0);
1460 sbus_writel(tmp, dbri->regs + REG0);
1462 reset_chi(dbri, CHImaster, 128);
1471 link_time_slot(dbri, 17, 16, 16, 32, dbri->mm.offset);
1472 link_time_slot(dbri, 18, 16, 16, 8, dbri->mm.offset);
1473 link_time_slot(dbri, 19, 18, 16, 8, dbri->mm.offset + 48);
1474 spin_unlock_irqrestore(&dbri->lock, flags);
1477 dbri->mm.ctrl[0] &= ~CS4215_CLB;
1478 xmit_fixed(dbri, 17, *(int *)dbri->mm.ctrl);
1480 spin_lock_irqsave(&dbri->lock, flags);
1481 tmp = sbus_readl(dbri->regs + REG0);
1483 sbus_writel(tmp, dbri->regs + REG0);
1484 spin_unlock_irqrestore(&dbri->lock, flags);
1486 for (i = 10; ((dbri->mm.status & 0xe4) != 0x20); --i) {
1491 dbri->mm.status);
1498 recv_fixed(dbri, 19, NULL);
1503 dbri->mm.ctrl[0] |= CS4215_CLB;
1504 xmit_fixed(dbri, 17, *(int *)dbri->mm.ctrl);
1509 cs4215_setdata(dbri, 0);
1520 static int cs4215_prepare(struct snd_dbri * dbri, unsigned int rate,
1538 dbri->mm.ctrl[1] = CS4215_DFR_ULAW;
1539 dbri->mm.precision = 8;
1542 dbri->mm.ctrl[1] = CS4215_DFR_ALAW;
1543 dbri->mm.precision = 8;
1546 dbri->mm.ctrl[1] = CS4215_DFR_LINEAR8;
1547 dbri->mm.precision = 8;
1550 dbri->mm.ctrl[1] = CS4215_DFR_LINEAR16;
1551 dbri->mm.precision = 16;
1559 dbri->mm.ctrl[1] |= CS4215_FREQ[freq_idx].csval;
1560 dbri->mm.ctrl[2] = CS4215_XCLK |
1563 dbri->mm.channels = channels;
1565 dbri->mm.ctrl[1] |= CS4215_DFR_STEREO;
1567 ret = cs4215_setctrl(dbri);
1569 cs4215_open(dbri); /* set codec to data mode */
1577 static int cs4215_init(struct snd_dbri * dbri)
1579 u32 reg2 = sbus_readl(dbri->regs + REG2);
1585 dbri->mm.onboard = 1;
1589 dbri->mm.onboard = 0;
1594 sbus_writel(D_ENPIO2, dbri->regs + REG2);
1603 cs4215_setup_pipes(dbri);
1604 cs4215_init_data(&dbri->mm);
1607 recv_fixed(dbri, 18, &dbri->mm.status);
1608 recv_fixed(dbri, 19, &dbri->mm.version);
1610 dbri->mm.offset = dbri->mm.onboard ? 0 : 8;
1611 if (cs4215_setctrl(dbri) == -1 || dbri->mm.version == 0xff) {
1613 dbri->mm.offset);
1616 dprintk(D_MM, "Found CS4215 at offset %d\n", dbri->mm.offset);
1641 static void xmit_descs(struct snd_dbri *dbri)
1648 if (dbri == NULL)
1651 info = &dbri->stream_info[DBRI_REC];
1652 spin_lock_irqsave(&dbri->lock, flags);
1655 first_td = dbri->pipes[info->pipe].first_desc;
1661 cmd = dbri_cmdlock(dbri, 2);
1663 dbri->pipes[info->pipe].sdp
1665 *(cmd++) = dbri->dma_dvma + dbri_dma_off(desc, first_td);
1666 dbri_cmdsend(dbri, cmd, 2);
1669 dbri->pipes[info->pipe].desc = first_td;
1673 info = &dbri->stream_info[DBRI_PLAY];
1676 first_td = dbri->pipes[info->pipe].first_desc;
1682 cmd = dbri_cmdlock(dbri, 2);
1684 dbri->pipes[info->pipe].sdp
1686 *(cmd++) = dbri->dma_dvma + dbri_dma_off(desc, first_td);
1687 dbri_cmdsend(dbri, cmd, 2);
1690 dbri->pipes[info->pipe].desc = first_td;
1694 spin_unlock_irqrestore(&dbri->lock, flags);
1711 static void transmission_complete_intr(struct snd_dbri * dbri, int pipe)
1717 info = &dbri->stream_info[DBRI_PLAY];
1719 td = dbri->pipes[pipe].desc;
1726 status = DBRI_TD_STATUS(dbri->dma->desc[td].word4);
1733 dbri->dma->desc[td].word4 = 0; /* Reset it for next time. */
1734 info->offset += DBRI_RD_CNT(dbri->dma->desc[td].word1);
1736 td = dbri->next_desc[td];
1737 dbri->pipes[pipe].desc = td;
1741 if (spin_is_locked(&dbri->lock)) {
1742 spin_unlock(&dbri->lock);
1744 spin_lock(&dbri->lock);
1749 static void reception_complete_intr(struct snd_dbri * dbri, int pipe)
1752 int rd = dbri->pipes[pipe].desc;
1760 dbri->pipes[pipe].desc = dbri->next_desc[rd];
1761 status = dbri->dma->desc[rd].word1;
1762 dbri->dma->desc[rd].word1 = 0; /* Reset it for next time. */
1764 info = &dbri->stream_info[DBRI_REC];
1772 if (spin_is_locked(&dbri->lock)) {
1773 spin_unlock(&dbri->lock);
1775 spin_lock(&dbri->lock);
1780 static void dbri_process_one_interrupt(struct snd_dbri * dbri, int x)
1804 reception_complete_intr(dbri, channel);
1808 transmission_complete_intr(dbri, channel);
1820 if (dbri->pipes[channel].sdp & D_SDP_MSB)
1821 val = reverse_bytes(val, dbri->pipes[channel].length);
1823 if (dbri->pipes[channel].recv_fixed_ptr)
1824 *(dbri->pipes[channel].recv_fixed_ptr) = val;
1838 static void dbri_process_interrupt_buffer(struct snd_dbri * dbri)
1842 while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) {
1843 dbri->dma->intr[dbri->dbri_irqp] = 0;
1844 dbri->dbri_irqp++;
1845 if (dbri->dbri_irqp == DBRI_INT_BLK)
1846 dbri->dbri_irqp = 1;
1848 dbri_process_one_interrupt(dbri, x);
1854 struct snd_dbri *dbri = dev_id;
1858 if (dbri == NULL)
1860 spin_lock(&dbri->lock);
1865 x = sbus_readl(dbri->regs + REG1);
1895 dbri_reset(dbri);
1897 tmp = sbus_readl(dbri->regs + REG0);
1899 sbus_writel(tmp, dbri->regs + REG0);
1903 dbri_process_interrupt_buffer(dbri);
1905 spin_unlock(&dbri->lock);
1969 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
1971 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
1977 spin_lock_irqsave(&dbri->lock, flags);
1982 spin_unlock_irqrestore(&dbri->lock, flags);
1992 cs4215_open(dbri);
1999 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
2000 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
2013 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
2014 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
2019 ret = cs4215_prepare(dbri, params_rate(hw_params),
2039 info->dvma_buffer = sbus_map_single(dbri->sdev,
2053 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
2054 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
2067 sbus_unmap_single(dbri->sdev, info->dvma_buffer,
2072 reset_pipe(dbri, info->pipe);
2081 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
2082 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
2091 spin_lock_irq(&dbri->lock);
2097 ret = setup_descs(dbri, DBRI_STREAMNO(substream),
2100 spin_unlock_irq(&dbri->lock);
2108 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
2109 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
2117 xmit_descs(dbri);
2121 reset_pipe(dbri, info->pipe);
2132 struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
2133 struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
2154 static int __devinit snd_dbri_pcm(struct snd_dbri * dbri)
2159 if ((err = snd_pcm_new(dbri->card,
2170 pcm->private_data = dbri;
2172 strcpy(pcm->name, dbri->card->shortname);
2205 struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol);
2207 snd_assert(dbri != NULL, return -EINVAL);
2208 info = &dbri->stream_info[kcontrol->private_value];
2219 struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol);
2220 struct dbri_streaminfo *info = &dbri->stream_info[kcontrol->private_value];
2235 cs4215_setdata(dbri, 1);
2237 cs4215_setdata(dbri, 0);
2258 struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol);
2263 snd_assert(dbri != NULL, return -EINVAL);
2267 (dbri->mm.data[elem] >> shift) & mask;
2270 (dbri->mm.ctrl[elem - 4] >> shift) & mask;
2283 struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol);
2290 snd_assert(dbri != NULL, return -EINVAL);
2298 dbri->mm.data[elem] = (dbri->mm.data[elem] &
2300 changed = (val != dbri->mm.data[elem]);
2302 dbri->mm.ctrl[elem - 4] = (dbri->mm.ctrl[elem - 4] &
2304 changed = (val != dbri->mm.ctrl[elem - 4]);
2310 dbri->mm.data[elem & 3]);
2316 cs4215_setdata(dbri, 1);
2318 cs4215_setdata(dbri, 0);
2359 static int __init snd_dbri_mixer(struct snd_dbri * dbri)
2364 snd_assert(dbri != NULL && dbri->card != NULL, return -EINVAL);
2366 card = dbri->card;
2371 snd_ctl_new1(&dbri_controls[idx], dbri))) < 0)
2376 dbri->stream_info[idx].left_gain = 0;
2377 dbri->stream_info[idx].right_gain = 0;
2388 struct snd_dbri *dbri = entry->private_data;
2390 snd_iprintf(buffer, "REG0: 0x%x\n", sbus_readl(dbri->regs + REG0));
2391 snd_iprintf(buffer, "REG2: 0x%x\n", sbus_readl(dbri->regs + REG2));
2392 snd_iprintf(buffer, "REG8: 0x%x\n", sbus_readl(dbri->regs + REG8));
2393 snd_iprintf(buffer, "REG9: 0x%x\n", sbus_readl(dbri->regs + REG9));
2400 struct snd_dbri *dbri = entry->private_data;
2405 if (pipe_active(dbri, pipe)) {
2406 struct dbri_pipe *pptr = &dbri->pipes[pipe];
2419 void snd_dbri_proc(struct snd_dbri * dbri)
2423 if (! snd_card_proc_new(dbri->card, "regs", &entry))
2424 snd_info_set_text_ops(entry, dbri, dbri_regs_read);
2427 if (! snd_card_proc_new(dbri->card, "debug", &entry)) {
2428 snd_info_set_text_ops(entry, dbri, dbri_debug_read);
2439 static void snd_dbri_free(struct snd_dbri * dbri);
2445 struct snd_dbri *dbri = card->private_data;
2448 spin_lock_init(&dbri->lock);
2449 dbri->card = card;
2450 dbri->sdev = sdev;
2451 dbri->irq = irq->pri;
2453 dbri->dma = sbus_alloc_consistent(sdev, sizeof(struct dbri_dma),
2454 &dbri->dma_dvma);
2455 memset((void *)dbri->dma, 0, sizeof(struct dbri_dma));
2458 dbri->dma, dbri->dma_dvma);
2461 dbri->regs_size = sdev->reg_addrs[0].reg_size;
2462 dbri->regs = sbus_ioremap(&sdev->resource[0], 0,
2463 dbri->regs_size, "DBRI Registers");
2464 if (!dbri->regs) {
2467 (void *)dbri->dma, dbri->dma_dvma);
2471 err = request_irq(dbri->irq, snd_dbri_interrupt, IRQF_SHARED,
2472 "DBRI audio", dbri);
2474 printk(KERN_ERR "DBRI: Can't get irq %d\n", dbri->irq);
2475 sbus_iounmap(dbri->regs, dbri->regs_size);
2477 (void *)dbri->dma, dbri->dma_dvma);
2482 dbri_initialize(dbri);
2483 err = cs4215_init(dbri);
2485 snd_dbri_free(dbri);
2489 dbri->next = dbri_list;
2490 dbri_list = dbri;
2495 static void snd_dbri_free(struct snd_dbri * dbri)
2498 dbri_reset(dbri);
2500 if (dbri->irq)
2501 free_irq(dbri->irq, dbri);
2503 if (dbri->regs)
2504 sbus_iounmap(dbri->regs, dbri->regs_size);
2506 if (dbri->dma)
2507 sbus_free_consistent(dbri->sdev, sizeof(struct dbri_dma),
2508 (void *)dbri->dma, dbri->dma_dvma);
2513 struct snd_dbri *dbri;
2556 dbri = card->private_data;
2557 if ((err = snd_dbri_pcm(dbri)) < 0)
2560 if ((err = snd_dbri_mixer(dbri)) < 0)
2564 snd_dbri_proc(dbri);
2570 dev, dbri->regs,
2571 dbri->irq, sdev->prom_name[9], dbri->mm.version);
2577 snd_dbri_free(dbri);
2582 /* Probe for the dbri chip and then attach the driver. */