Lines Matching refs:control_register
175 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
211 u32 control_register; /* cached value */
369 i = rme9652->control_register & RME9652_latency;
442 s->control_register |= (RME9652_IE | RME9652_start_bit);
443 rme9652_write(s, RME9652_control_register, s->control_register);
448 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
449 rme9652_write(s, RME9652_control_register, s->control_register);
471 s->control_register &= ~RME9652_latency;
472 s->control_register |= rme9652_encode_latency(n);
474 rme9652_write(s, RME9652_control_register, s->control_register);
548 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
549 rme9652->control_register |= rate;
550 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
624 rme9652->control_register =
632 rme9652->control_register);
646 rme9652->control_register |= mask;
648 rme9652->control_register &= ~mask;
650 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
717 rme9652->control_register |= RME9652_SPDIF_RESET;
868 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
869 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
895 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
905 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
907 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
915 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
971 return rme9652_decode_spdif_in(rme9652->control_register &
979 rme9652->control_register &= ~RME9652_inp;
980 rme9652->control_register |= rme9652_encode_spdif_in(in);
986 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1042 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1050 rme9652->control_register |= RME9652_opt_out;
1052 rme9652->control_register &= ~RME9652_opt_out;
1059 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1110 if (rme9652->control_register & RME9652_wsel) {
1112 } else if (rme9652->control_register & RME9652_Master) {
1125 rme9652->control_register &=
1129 rme9652->control_register =
1130 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1133 rme9652->control_register |=
1142 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1195 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1213 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1216 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1219 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1222 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1225 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1233 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1625 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1629 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1639 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1642 } else if (rme9652->control_register & RME9652_wsel) {
1653 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1673 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1678 switch (rme9652_decode_spdif_in(rme9652->control_register &
1694 if (rme9652->control_register & RME9652_opt_out) {
1700 if (rme9652->control_register & RME9652_PRO) {
1706 if (rme9652->control_register & RME9652_EMP) {
1712 if (rme9652->control_register & RME9652_Dolby) {
1860 rme9652->control_register =
1863 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
2014 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2015 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);