Lines Matching refs:ice
82 static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
85 return ((unsigned short)ice->akm[0].images[reg] << 8) |
86 ice->akm[0].images[reg + 1];
92 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
96 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
99 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
101 wm_put_nocache(ice, reg, val);
103 ice->akm[0].images[reg] = val >> 8;
104 ice->akm[0].images[reg + 1] = val;
126 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
130 mutex_lock(&ice->gpio_mutex);
132 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
136 mutex_unlock(&ice->gpio_mutex);
142 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
146 mutex_lock(&ice->gpio_mutex);
151 oval = wm_get(ice, idx) & 0xff;
153 wm_put(ice, idx, nval);
154 wm_put_nocache(ice, idx, nval | 0x100);
158 mutex_unlock(&ice->gpio_mutex);
181 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
185 mutex_lock(&ice->gpio_mutex);
187 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
191 mutex_unlock(&ice->gpio_mutex);
197 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
201 mutex_lock(&ice->gpio_mutex);
206 ovol = wm_get(ice, idx) & 0xff;
208 wm_put(ice, idx, nvol);
212 mutex_unlock(&ice->gpio_mutex);
230 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
233 mutex_lock(&ice->gpio_mutex);
234 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
235 mutex_unlock(&ice->gpio_mutex);
241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
246 mutex_lock(&ice->gpio_mutex);
247 nval = oval = wm_get(ice, WM_ADC_MUX);
254 wm_put(ice, WM_ADC_MUX, nval);
256 mutex_unlock(&ice->gpio_mutex);
274 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
276 mutex_lock(&ice->gpio_mutex);
277 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
278 mutex_unlock(&ice->gpio_mutex);
284 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
288 mutex_lock(&ice->gpio_mutex);
289 val = oval = wm_get(ice, WM_OUT_MUX);
295 wm_put(ice, WM_OUT_MUX, val);
298 mutex_unlock(&ice->gpio_mutex);
316 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
318 mutex_lock(&ice->gpio_mutex);
319 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
320 mutex_unlock(&ice->gpio_mutex);
326 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
330 mutex_lock(&ice->gpio_mutex);
331 oval = wm_get(ice, WM_DAC_CTRL1);
338 wm_put(ice, WM_DAC_CTRL1, val);
339 wm_put_nocache(ice, WM_DAC_CTRL1, val);
342 mutex_unlock(&ice->gpio_mutex);
349 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
351 unsigned int tmp = snd_ice1712_gpio_read(ice);
356 snd_ice1712_gpio_write(ice, tmp);
359 static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
363 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
365 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
367 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
373 static unsigned int spi_read_byte(struct snd_ice1712 *ice)
380 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
382 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
385 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
392 static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
394 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
395 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
396 set_gpio_bit(ice, PONTIS_CS_CS, 0);
397 spi_send_byte(ice, dev & ~1); /* WRITE */
398 spi_send_byte(ice, reg); /* MAP */
399 spi_send_byte(ice, data); /* DATA */
401 set_gpio_bit(ice, PONTIS_CS_CS, 1);
404 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
405 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
408 static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
411 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
412 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
413 set_gpio_bit(ice, PONTIS_CS_CS, 0);
414 spi_send_byte(ice, dev & ~1); /* WRITE */
415 spi_send_byte(ice, reg); /* MAP */
417 set_gpio_bit(ice, PONTIS_CS_CS, 1);
419 set_gpio_bit(ice, PONTIS_CS_CS, 0);
420 spi_send_byte(ice, dev | 1); /* READ */
421 val = spi_read_byte(ice);
423 set_gpio_bit(ice, PONTIS_CS_CS, 1);
426 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
427 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
453 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
455 mutex_lock(&ice->gpio_mutex);
456 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
457 mutex_unlock(&ice->gpio_mutex);
463 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
467 mutex_lock(&ice->gpio_mutex);
468 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
469 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
470 val = 0x80 | (ice->gpio.saved[0] << 3);
471 spi_write(ice, CS_DEV, 0x04, val);
474 mutex_unlock(&ice->gpio_mutex);
493 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
494 mutex_lock(&ice->gpio_mutex);
496 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
497 mutex_unlock(&ice->gpio_mutex);
503 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
506 mutex_lock(&ice->gpio_mutex);
509 changed = val != ice->gpio.write_mask;
510 ice->gpio.write_mask = val;
511 mutex_unlock(&ice->gpio_mutex);
517 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
518 mutex_lock(&ice->gpio_mutex);
520 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
521 mutex_unlock(&ice->gpio_mutex);
527 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
530 mutex_lock(&ice->gpio_mutex);
533 changed = (val != ice->gpio.direction);
534 ice->gpio.direction = val;
535 mutex_unlock(&ice->gpio_mutex);
541 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
542 mutex_lock(&ice->gpio_mutex);
543 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
544 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
545 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
546 mutex_unlock(&ice->gpio_mutex);
552 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
555 mutex_lock(&ice->gpio_mutex);
556 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
557 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
558 val = snd_ice1712_gpio_read(ice) & 0xffff;
561 snd_ice1712_gpio_write(ice, nval);
564 mutex_unlock(&ice->gpio_mutex);
661 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
664 mutex_lock(&ice->gpio_mutex);
669 wm_put(ice, reg, val);
671 mutex_unlock(&ice->gpio_mutex);
676 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
679 mutex_lock(&ice->gpio_mutex);
681 val = wm_get(ice, reg);
684 mutex_unlock(&ice->gpio_mutex);
687 static void wm_proc_init(struct snd_ice1712 *ice)
690 if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
691 snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
699 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
702 mutex_lock(&ice->gpio_mutex);
704 val = spi_read(ice, CS_DEV, reg);
707 val = spi_read(ice, CS_DEV, 0x7f);
709 mutex_unlock(&ice->gpio_mutex);
712 static void cs_proc_init(struct snd_ice1712 *ice)
715 if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
716 snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
720 static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
726 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
731 wm_proc_init(ice);
732 cs_proc_init(ice);
741 static int __devinit pontis_init(struct snd_ice1712 *ice)
781 ice->vt1720 = 1;
782 ice->num_total_dacs = 2;
783 ice->num_total_adcs = 2;
786 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
787 if (! ice->akm)
789 ice->akm_codecs = 1;
794 ice->gpio.saved[0] = 0;
798 wm_put(ice, wm_inits[i], wm_inits[i+1]);
801 wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
805 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
808 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
811 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);