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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/sound/pci/echoaudio/

Lines Matching refs:chip

36 static int check_asic_status(struct echoaudio *chip)
40 if (wait_handshake(chip))
43 chip->comm_page->ext_box_status =
45 chip->asic_loaded = FALSE;
46 clear_handshake(chip);
47 send_vector(chip, DSP_VC_TEST_ASIC);
49 if (wait_handshake(chip)) {
50 chip->dsp_code = NULL;
54 box_status = le32_to_cpu(chip->comm_page->ext_box_status);
59 chip->asic_loaded = TRUE;
65 static inline u32 get_frq_reg(struct echoaudio *chip)
67 return le32_to_cpu(chip->comm_page->e3g_frq_register);
74 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
77 if (wait_handshake(chip))
85 if (ctl != chip->comm_page->control_register ||
86 frq != chip->comm_page->e3g_frq_register || force) {
87 chip->comm_page->e3g_frq_register = frq;
88 chip->comm_page->control_register = ctl;
89 clear_handshake(chip);
90 return send_vector(chip, DSP_VC_WRITE_CONTROL_REG);
100 static int set_digital_mode(struct echoaudio *chip, u8 mode)
106 snd_assert(!chip->pipe_alloc_mask, return -EAGAIN);
108 snd_assert(chip->digital_modes & (1 << mode), return -EINVAL);
110 previous_mode = chip->digital_mode;
111 err = dsp_set_digital_mode(chip, mode);
118 spin_lock_irq(&chip->lock);
119 for (o = 0; o < num_busses_out(chip); o++)
120 for (i = 0; i < num_busses_in(chip); i++)
121 set_monitor_gain(chip, o, i,
122 chip->monitor_gain[o][i]);
125 for (i = 0; i < num_busses_in(chip); i++)
126 set_input_gain(chip, i, chip->input_gain[i]);
127 update_input_line_level(chip);
130 for (o = 0; o < num_busses_out(chip); o++)
131 set_output_gain(chip, o, chip->output_gain[o]);
132 update_output_line_level(chip);
133 spin_unlock_irq(&chip->lock);
141 static u32 set_spdif_bits(struct echoaudio *chip, u32 control_reg, u32 rate)
150 if (chip->professional_spdif)
158 if (chip->professional_spdif)
161 if (chip->non_audio_spdif)
173 static int set_professional_spdif(struct echoaudio *chip, char prof)
177 control_reg = le32_to_cpu(chip->comm_page->control_register);
178 chip->professional_spdif = prof;
179 control_reg = set_spdif_bits(chip, control_reg, chip->sample_rate);
180 return write_control_reg(chip, control_reg, get_frq_reg(chip), 0);
189 static u32 detect_input_clocks(const struct echoaudio *chip)
195 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
202 switch(chip->digital_mode) {
219 static int load_asic(struct echoaudio *chip)
223 if (chip->asic_loaded)
229 err = load_asic_generic(chip, DSP_FNC_LOAD_3G_ASIC,
234 chip->asic_code = &card_fw[FW_3G_ASIC];
239 box_type = check_asic_status(chip);
244 err = write_control_reg(chip, E3G_48KHZ,
255 static int set_sample_rate(struct echoaudio *chip, u32 rate)
260 if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
264 chip->comm_page->sample_rate = cpu_to_le32(rate);
265 chip->sample_rate = rate;
266 set_input_clock(chip, chip->input_clock);
270 snd_assert(rate < 50000 || chip->digital_mode != DIGITAL_MODE_ADAT,
274 control_reg = le32_to_cpu(chip->comm_page->control_register);
301 control_reg = set_spdif_bits(chip, control_reg, rate);
313 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
314 chip->sample_rate = rate;
318 return write_control_reg(chip, control_reg, frq_reg, 0);
324 static int set_input_clock(struct echoaudio *chip, u16 clock)
331 control_reg = le32_to_cpu(chip->comm_page->control_register) &
333 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
338 chip->input_clock = ECHO_CLOCK_INTERNAL;
339 return set_sample_rate(chip, chip->sample_rate);
341 if (chip->digital_mode == DIGITAL_MODE_ADAT)
351 if (chip->digital_mode != DIGITAL_MODE_ADAT)
370 chip->input_clock = clock;
371 return write_control_reg(chip, control_reg, get_frq_reg(chip), 1);
376 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
386 if (chip->input_clock == ECHO_CLOCK_ADAT)
390 if (chip->input_clock == ECHO_CLOCK_SPDIF)
398 spin_lock_irq(&chip->lock);
401 chip->sample_rate = 48000;
402 set_input_clock(chip, ECHO_CLOCK_INTERNAL);
406 control_reg = le32_to_cpu(chip->comm_page->control_register);
423 err = write_control_reg(chip, control_reg, get_frq_reg(chip), 1);
424 spin_unlock_irq(&chip->lock);
427 chip->digital_mode = mode;
429 DE_ACT(("set_digital_mode(%d)\n", chip->digital_mode));