Lines Matching refs:devc
83 static inline int mpu401_status(struct mpu_config *devc)
85 return inb(STATPORT(devc->base));
88 #define input_avail(devc) (!(mpu401_status(devc)&INPUT_AVAIL))
89 #define output_ready(devc) (!(mpu401_status(devc)&OUTPUT_READY))
91 static inline void write_command(struct mpu_config *devc, unsigned char cmd)
93 outb(cmd, COMDPORT(devc->base));
96 static inline int read_data(struct mpu_config *devc)
98 return inb(DATAPORT(devc->base));
101 static inline void write_data(struct mpu_config *devc, unsigned char byte)
103 outb(byte, DATAPORT(devc->base));
116 static int reset_mpu401(struct mpu_config *devc);
117 static void set_uart_mode(int dev, struct mpu_config *devc, int arg);
121 static void timer_ext_event(struct mpu_config *devc, int event, int parm);
174 static int mpu_input_scanner(struct mpu_config *devc, unsigned char midic)
177 switch (devc->m_state)
191 if (devc->timer_flag)
214 devc->m_state = ST_SYSMSG;
221 devc->m_state = ST_TIMED;
232 devc->m_state = ST_DATABYTE;
237 msg = ((int) (devc->last_status & 0xf0) >> 4);
239 devc->m_left = len_tab[msg] - 1;
241 devc->m_ptr = 2;
242 devc->m_buf[0] = devc->last_status;
243 devc->m_buf[1] = midic;
245 if (devc->m_left <= 0)
247 devc->m_state = ST_INIT;
248 do_midi_msg(devc->synthno, devc->m_buf, devc->m_ptr);
249 devc->m_ptr = 0;
254 devc->m_state = ST_INIT;
276 devc->last_status = midic;
279 devc->m_left = len_tab[msg];
281 devc->m_ptr = 1;
282 devc->m_buf[0] = midic;
284 if (devc->m_left <= 0)
286 devc->m_state = ST_INIT;
287 do_midi_msg(devc->synthno, devc->m_buf, devc->m_ptr);
288 devc->m_ptr = 0;
299 devc->m_state = ST_SYSEX;
303 devc->m_state = ST_MTC;
307 devc->m_state = ST_SONGPOS;
308 devc->m_ptr = 0;
312 devc->m_state = ST_SONGSEL;
317 devc->m_state = ST_INIT;
324 devc->m_state = ST_INIT;
325 timer_ext_event(devc, TMR_CLOCK, 0);
329 devc->m_state = ST_INIT;
330 timer_ext_event(devc, TMR_START, 0);
334 devc->m_state = ST_INIT;
335 timer_ext_event(devc, TMR_CONTINUE, 0);
339 devc->m_state = ST_INIT;
340 timer_ext_event(devc, TMR_STOP, 0);
345 devc->m_state = ST_INIT;
350 devc->m_state = ST_INIT;
355 devc->m_state = ST_INIT;
360 devc->m_state = ST_INIT;
368 devc->m_state = ST_INIT;
375 BUFTEST(devc);
376 devc->m_buf[devc->m_ptr++] = midic;
377 if (devc->m_ptr == 2)
379 devc->m_state = ST_INIT;
380 devc->m_ptr = 0;
381 timer_ext_event(devc, TMR_SPP,
382 ((devc->m_buf[1] & 0x7f) << 7) |
383 (devc->m_buf[0] & 0x7f));
388 BUFTEST(devc);
389 devc->m_buf[devc->m_ptr++] = midic;
390 if ((--devc->m_left) <= 0)
392 devc->m_state = ST_INIT;
393 do_midi_msg(devc->synthno, devc->m_buf, devc->m_ptr);
394 devc->m_ptr = 0;
399 printk("Bad state %d ", devc->m_state);
400 devc->m_state = ST_INIT;
405 static void mpu401_input_loop(struct mpu_config *devc)
411 spin_lock_irqsave(&devc->lock,flags);
412 busy = devc->m_busy;
413 devc->m_busy = 1;
414 spin_unlock_irqrestore(&devc->lock,flags);
421 while (input_avail(devc) && n-- > 0)
423 unsigned char c = read_data(devc);
425 if (devc->mode == MODE_SYNTH)
427 mpu_input_scanner(devc, c);
429 else if (devc->opened & OPEN_READ && devc->inputintr != NULL)
430 devc->inputintr(devc->devno, c);
432 devc->m_busy = 0;
437 struct mpu_config *devc;
441 devc = &dev_conf[dev];
443 if (input_avail(devc))
446 if (devc->base != 0 && (devc->opened & OPEN_READ || devc->mode == MODE_SYNTH))
447 mpu401_input_loop(devc);
451 read_data(devc);
463 struct mpu_config *devc;
469 devc = &dev_conf[dev];
471 if (devc->opened)
480 if (!devc->initialized)
482 if (mpu401_status(devc) == 0xff) /* Bus float */
487 reset_mpu401(devc);
497 if ((err = coprocessor->open(coprocessor->devc, COPR_MIDI)) < 0)
505 set_uart_mode(dev, devc, 1);
506 devc->mode = MODE_MIDI;
507 devc->synthno = 0;
509 mpu401_input_loop(devc);
511 devc->inputintr = input;
512 devc->opened = mode;
519 struct mpu_config *devc;
522 devc = &dev_conf[dev];
523 if (devc->uart_mode)
524 reset_mpu401(devc); /*
527 devc->mode = 0;
528 devc->inputintr = NULL;
532 coprocessor->close(coprocessor->devc, COPR_MIDI);
535 devc->opened = 0;
543 struct mpu_config *devc;
545 devc = &dev_conf[dev];
552 for (timeout = 30000; timeout > 0 && !output_ready(devc); timeout--);
554 spin_lock_irqsave(&devc->lock,flags);
555 if (!output_ready(devc))
558 spin_unlock_irqrestore(&devc->lock,flags);
561 write_data(devc, midi_byte);
562 spin_unlock_irqrestore(&devc->lock,flags);
571 struct mpu_config *devc;
573 devc = &dev_conf[dev];
575 if (devc->uart_mode) /*
585 if (input_avail(devc))
586 mpu401_input_loop(devc);
600 spin_lock_irqsave(&devc->lock,flags);
602 if (!output_ready(devc))
604 spin_unlock_irqrestore(&devc->lock,flags);
607 write_command(devc, cmd->cmd);
612 if (input_avail(devc))
614 if (devc->opened && devc->mode == MODE_SYNTH)
616 if (mpu_input_scanner(devc, read_data(devc)) == MPU_ACK)
622 if (read_data(devc) == MPU_ACK)
629 spin_unlock_irqrestore(&devc->lock,flags);
636 for (timeout = 3000; timeout > 0 && !output_ready(devc); timeout--);
640 spin_unlock_irqrestore(&devc->lock,flags);
655 if (input_avail(devc))
657 cmd->data[i] = read_data(devc);
662 spin_unlock_irqrestore(&devc->lock,flags);
667 spin_unlock_irqrestore(&devc->lock,flags);
689 struct mpu_config *devc = &dev_conf[dev];
691 if (devc->uart_mode)
724 struct mpu_config *devc;
728 devc = &dev_conf[dev];
732 if (!(devc->capabilities & MPU_CAP_INTLG)) { /* No intelligent mode */
738 set_uart_mode(dev, devc, !val);
769 struct mpu_config *devc;
776 devc = &dev_conf[midi_dev];
798 struct mpu_config *devc;
806 devc = &dev_conf[midi_dev];
815 if (!devc->initialized)
817 if (mpu401_status(devc) == 0xff) /* Bus float */
822 reset_mpu401(devc);
824 if (devc->opened)
826 devc->mode = MODE_SYNTH;
827 devc->synthno = dev;
829 devc->inputintr = NULL;
836 if ((err = coprocessor->open(coprocessor->devc, COPR_MIDI)) < 0)
842 devc->opened = mode;
843 reset_mpu401(devc);
857 struct mpu_config *devc;
862 devc = &dev_conf[midi_dev];
866 devc->inputintr = NULL;
870 coprocessor->close(coprocessor->devc, COPR_MIDI);
873 devc->opened = 0;
874 devc->mode = 0;
926 static void mpu401_chk_version(int n, struct mpu_config *devc)
931 devc->version = devc->revision = 0;
933 spin_lock_irqsave(&devc->lock,flags);
936 spin_unlock_irqrestore(&devc->lock,flags);
941 spin_unlock_irqrestore(&devc->lock,flags);
944 devc->version = tmp;
948 devc->version = 0;
949 spin_unlock_irqrestore(&devc->lock,flags);
952 devc->revision = tmp;
953 spin_unlock_irqrestore(&devc->lock,flags);
962 struct mpu_config *devc;
972 devc = &dev_conf[m];
973 devc->base = hw_config->io_base;
974 devc->osp = hw_config->osp;
975 devc->irq = hw_config->irq;
976 devc->opened = 0;
977 devc->uart_mode = 0;
978 devc->initialized = 0;
979 devc->version = 0;
980 devc->revision = 0;
981 devc->capabilities = 0;
982 devc->timer_flag = 0;
983 devc->m_busy = 0;
984 devc->m_state = ST_INIT;
985 devc->shared_irq = hw_config->always_detect;
986 devc->irq = hw_config->irq;
987 spin_lock_init(&devc->lock);
989 if (devc->irq < 0)
991 devc->irq *= -1;
992 devc->shared_irq = 1;
998 if (!reset_mpu401(devc))
1004 if (!devc->shared_irq)
1006 if (request_irq(devc->irq, mpuintr, 0, "mpu401", (void *)m) < 0)
1008 printk(KERN_WARNING "mpu401: Failed to allocate IRQ%d\n", devc->irq);
1013 spin_lock_irqsave(&devc->lock,flags);
1014 mpu401_chk_version(m, devc);
1015 if (devc->version == 0)
1016 mpu401_chk_version(m, devc);
1017 spin_unlock_irqrestore(&devc->lock,flags);
1020 if (devc->version != 0)
1023 devc->capabilities |= MPU_CAP_INTLG; /* Supports intelligent mode */
1034 if (!(devc->capabilities & MPU_CAP_INTLG)) /* No intelligent mode */
1061 if (devc->version == 0x20 && devc->revision >= 0x07) /* MusicQuest interface */
1063 int ports = (devc->revision & 0x08) ? 32 : 16;
1065 devc->capabilities |= MPU_CAP_SYNC | MPU_CAP_SMPTE |
1068 revision_char = (devc->revision == 0x7f) ? 'M' : ' ';
1076 revision_char = devc->revision ? devc->revision + '@' : ' ';
1077 if ((int) devc->revision > ('Z' - '@'))
1080 devc->capabilities |= MPU_CAP_SYNC | MPU_CAP_FSK;
1087 (int) (devc->version & 0xf0) >> 4,
1088 devc->version & 0x0f,
1098 mpu401_synth_operations[m]->midi_dev = devc->devno = m;
1099 mpu401_synth_operations[devc->devno]->info = &mpu_synth_info[devc->devno];
1101 if (devc->capabilities & MPU_CAP_INTLG) /* Intelligent mode */
1104 midi_devs[m] = &mpu401_midi_operations[devc->devno];
1115 free_irq(devc->irq, (void *)m);
1123 static int reset_mpu401(struct mpu_config *devc)
1136 timeout_limit = devc->initialized ? 30000 : 100000;
1137 devc->initialized = 1;
1142 ok = output_ready(devc);
1144 write_command(devc, MPU_RESET); /*
1155 spin_lock_irqsave(&devc->lock,flags);
1156 if (input_avail(devc))
1157 if (read_data(devc) == MPU_ACK)
1159 spin_unlock_irqrestore(&devc->lock,flags);
1164 devc->m_state = ST_INIT;
1165 devc->m_ptr = 0;
1166 devc->m_left = 0;
1167 devc->last_status = 0;
1168 devc->uart_mode = 0;
1173 static void set_uart_mode(int dev, struct mpu_config *devc, int arg)
1175 if (!arg && (devc->capabilities & MPU_CAP_INTLG))
1177 if ((devc->uart_mode == 0) == (arg == 0))
1179 reset_mpu401(devc); /* This exits the uart mode */
1186 devc->uart_mode = 0;
1190 devc->uart_mode = arg;
1285 static void tmr_reset(struct mpu_config *devc)
1289 spin_lock_irqsave(&devc->lock,flags);
1293 spin_unlock_irqrestore(&devc->lock,flags);
1348 struct mpu_config *devc= &dev_conf[midi_dev];
1350 tmr_reset(devc);
1375 struct mpu_config *devc= &dev_conf[midi_dev];
1380 tmr_reset(devc);
1647 static void timer_ext_event(struct mpu_config *devc, int event, int parm)
1649 int midi_dev = devc->devno;
1651 if (!devc->timer_flag)
1706 struct mpu_config *devc;
1709 devc = &dev_conf[midi_dev];
1724 if (devc->version < 0x20) /* Original MPU-401 */
1736 if (devc->revision)
1739 if (devc->revision & 0x02)
1743 if (devc->revision & 0x40)