Lines Matching refs:devc
136 static int ad_format_mask[13 /*devc->model */ ] =
163 } capabilities [10 /*devc->model */ ] = {
205 static int ad_read(ad1848_info * devc, int reg)
210 while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */
215 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
216 x = inb(io_Indexed_Data(devc));
224 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
225 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
226 x = inb(io_Indexed_Data(devc));
232 static void ad_write(ad1848_info * devc, int reg, int data)
236 while (timeout > 0 && inb(devc->base) == 0x80) /* Are we initializing */
241 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
242 outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc));
250 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
251 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
252 outb((unsigned char) (data & 0xff), io_Indexed_Data(devc));
256 static void wait_for_calibration(ad1848_info * devc)
268 while (timeout > 0 && inb(devc->base) == 0x80)
270 if (inb(devc->base) & 0x80)
274 while (timeout > 0 && !(ad_read(devc, 11) & 0x20))
276 if (!(ad_read(devc, 11) & 0x20))
280 while (timeout > 0 && (ad_read(devc, 11) & 0x20))
282 if (ad_read(devc, 11) & 0x20)
283 if ( (devc->model != MD_1845) || (devc->model != MD_1845_SSCAPE))
287 static void ad_mute(ad1848_info * devc)
298 prev = devc->saved_regs[i] = ad_read(devc, i);
303 static void ad_unmute(ad1848_info * devc)
307 static void ad_enter_MCE(ad1848_info * devc)
312 while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */
315 devc->MCE_bit = 0x40;
316 prev = inb(io_Index_Addr(devc));
321 outb((devc->MCE_bit), io_Index_Addr(devc));
324 static void ad_leave_MCE(ad1848_info * devc)
329 while (timeout > 0 && inb(devc->base) == 0x80) /*Are we initializing */
332 acal = ad_read(devc, 9);
334 devc->MCE_bit = 0x00;
335 prev = inb(io_Index_Addr(devc));
336 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */
342 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */
344 wait_for_calibration(devc);
347 static int ad1848_set_recmask(ad1848_info * devc, int mask)
353 mask &= devc->supported_rec_devices;
358 if (devc->mixer_reroute[i] != i)
363 mask |= (1 << devc->mixer_reroute[i]);
373 spin_lock_irqsave(&devc->lock,flags);
378 mask &= ~devc->recmask; /* Filter out active settings */
413 ad_write(devc, 0, (ad_read(devc, 0) & 0x3f) | recdev);
414 ad_write(devc, 1, (ad_read(devc, 1) & 0x3f) | recdev);
421 if ((devc->supported_rec_devices & (1 << i)) == 0)
425 if (devc->mix_devices[i][j].nbits == 0) /* Inexistent channel */
433 set_rec_bit = ((mask & (1 << i)) != 0) ^ devc->mix_devices[i][j].recpol;
435 val = ad_read(devc, devc->mix_devices[i][j].recreg);
436 val &= ~(1 << devc->mix_devices[i][j].recpos);
437 val |= (set_rec_bit << devc->mix_devices[i][j].recpos);
438 ad_write(devc, devc->mix_devices[i][j].recreg, val);
442 spin_unlock_irqrestore(&devc->lock,flags);
447 if (devc->mixer_reroute[i] != i)
449 if (mask & (1 << devc->mixer_reroute[i]))
451 mask &= ~(1 << devc->mixer_reroute[i]);
456 devc->recmask = mask;
460 static void change_bits(ad1848_info * devc, unsigned char *regval,
469 set_mute_bit = (newval == 0) ^ devc->mix_devices[dev][chn].mutepol;
471 if (devc->mix_devices[dev][chn].polarity == 1) /* Reverse */
474 mask = (1 << devc->mix_devices[dev][chn].nbits) - 1;
475 shift = devc->mix_devices[dev][chn].bitpos;
477 if (devc->mix_devices[dev][chn].mutepos == 8)
484 mute = (set_mute_bit << devc->mix_devices[dev][chn].mutepos);
485 mutemask = ~(1 << devc->mix_devices[dev][chn].mutepos);
496 static int ad1848_mixer_get(ad1848_info * devc, int dev)
498 if (!((1 << dev) & devc->supported_devices))
501 dev = devc->mixer_reroute[dev];
503 return devc->levels[dev];
506 static void ad1848_mixer_set_channel(ad1848_info *devc, int dev, int value, int channel)
512 regoffs = devc->mix_devices[dev][channel].regno;
513 muteregoffs = devc->mix_devices[dev][channel].mutereg;
514 val = ad_read(devc, regoffs);
517 muteval = ad_read(devc, muteregoffs);
518 change_bits(devc, &val, &muteval, dev, channel, value);
521 change_bits(devc, &val, &val, dev, channel, value);
523 spin_lock_irqsave(&devc->lock,flags);
524 ad_write(devc, regoffs, val);
525 devc->saved_regs[regoffs] = val;
527 ad_write(devc, muteregoffs, muteval);
528 devc->saved_regs[muteregoffs] = muteval;
530 spin_unlock_irqrestore(&devc->lock,flags);
533 static int ad1848_mixer_set(ad1848_info * devc, int dev, int value)
542 if (!(devc->supported_devices & (1 << dev)))
545 dev = devc->mixer_reroute[dev];
547 if (devc->mix_devices[dev][LEFT_CHN].nbits == 0)
555 if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0) /* Mono control */
564 devc->levels[dev] = retvol;
569 ad1848_mixer_set_channel(devc, dev, left, LEFT_CHN);
574 if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0)
576 ad1848_mixer_set_channel(devc, dev, right, RIGHT_CHN);
582 static void ad1848_mixer_reset(ad1848_info * devc)
588 devc->mix_devices = &(ad1848_mix_devices[0]);
590 sprintf(name, "%s_%d", devc->chip_name, nr_ad1848_devs);
593 devc->mixer_reroute[i] = i;
595 devc->supported_rec_devices = MODE1_REC_DEVICES;
597 switch (devc->model)
603 devc->supported_devices = MODE2_MIXER_DEVICES;
607 devc->supported_devices = C930_MIXER_DEVICES;
608 devc->mix_devices = &(c930_mix_devices[0]);
612 devc->supported_devices = MODE3_MIXER_DEVICES;
613 devc->mix_devices = &(iwave_mix_devices[0]);
618 devc->mix_devices = &(cs42xb_mix_devices[0]);
619 devc->supported_devices = MODE3_MIXER_DEVICES;
624 devc->supported_devices = MODE3_MIXER_DEVICES;
629 devc->supported_devices = SPRO_MIXER_DEVICES;
630 devc->supported_rec_devices = SPRO_REC_DEVICES;
631 devc->mix_devices = &(spro_mix_devices[0]);
636 devc->supported_devices = MODE1_MIXER_DEVICES;
639 devc->orig_devices = devc->supported_devices;
640 devc->orig_rec_devices = devc->supported_rec_devices;
642 devc->levels = load_mixer_volumes(name, default_mixer_levels, 1);
646 if (devc->supported_devices & (1 << i))
647 ad1848_mixer_set(devc, i, devc->levels[i]);
650 ad1848_set_recmask(devc, SOUND_MASK_MIC);
652 devc->mixer_output_port = devc->levels[31] | AUDIO_HEADPHONE | AUDIO_LINE_OUT;
654 spin_lock_irqsave(&devc->lock,flags);
656 if (devc->mixer_output_port & AUDIO_SPEAKER)
657 ad_write(devc, 26, ad_read(devc, 26) & ~0x40); /* Unmute mono out */
659 ad_write(devc, 26, ad_read(devc, 26) | 0x40); /* Mute mono out */
666 ad_write(devc, 16, 0x60);
668 spin_unlock_irqrestore(&devc->lock,flags);
673 ad1848_info *devc = mixer_devs[dev]->devc;
685 devc->mixer_output_port = val;
687 devc->mixer_output_port = val;
688 spin_lock_irqsave(&devc->lock,flags);
690 ad_write(devc, 26, ad_read(devc, 26) & ~0x40); /* Unmute mono out */
692 ad_write(devc, 26, ad_read(devc, 26) | 0x40); /* Mute mono out */
693 spin_unlock_irqrestore(&devc->lock,flags);
695 val = devc->mixer_output_port;
713 val = ad1848_set_recmask(devc, val);
719 val = ad1848_mixer_set(devc, cmd & 0xff, val);
733 val = devc->recmask;
737 val = devc->supported_devices;
741 val = devc->supported_devices;
742 if (devc->model != MD_C930)
747 val = devc->supported_rec_devices;
755 val = ad1848_mixer_get(devc, cmd & 0xff);
767 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
811 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* AD1845 has different timer than others */
867 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
922 if (!(arg & ad_format_mask[devc->model]))
968 ad1848_info *devc;
975 devc = (ad1848_info *) audio_devs[dev]->devc;
979 spin_lock(&devc->lock);
980 if (portc->open_mode || (devc->open_mode & mode))
982 spin_unlock(&devc->lock);
985 devc->dual_dma = 0;
989 devc->dual_dma = 1;
991 devc->intr_active = 0;
992 devc->audio_mode = 0;
993 devc->open_mode |= mode;
995 spin_unlock(&devc->lock);
999 devc->record_dev = dev;
1001 devc->playback_dev = dev;
1005 spin_lock_irqsave(&devc->lock,flags);
1006 ad_mute(devc);
1007 spin_unlock_irqrestore(&devc->lock,flags);
1015 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1020 devc->intr_active = 0;
1023 spin_lock_irqsave(&devc->lock,flags);
1025 devc->audio_mode = 0;
1026 devc->open_mode &= ~portc->open_mode;
1029 ad_unmute(devc);
1030 spin_unlock_irqrestore(&devc->lock,flags);
1036 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1054 if ((devc->audio_mode & PCM_ENABLE_OUTPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1056 cnt == devc->xfer_count)
1058 devc->audio_mode |= PCM_ENABLE_OUTPUT;
1059 devc->intr_active = 1;
1064 spin_lock_irqsave(&devc->lock,flags);
1066 ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1067 ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1069 devc->xfer_count = cnt;
1070 devc->audio_mode |= PCM_ENABLE_OUTPUT;
1071 devc->intr_active = 1;
1072 spin_unlock_irqrestore(&devc->lock,flags);
1078 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1095 if ((devc->audio_mode & PCM_ENABLE_INPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1097 cnt == devc->xfer_count)
1099 devc->audio_mode |= PCM_ENABLE_INPUT;
1100 devc->intr_active = 1;
1105 spin_lock_irqsave(&devc->lock,flags);
1107 if (devc->model == MD_1848)
1109 ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1110 ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1114 ad_write(devc, 31, (unsigned char) (cnt & 0xff));
1115 ad_write(devc, 30, (unsigned char) ((cnt >> 8) & 0xff));
1118 ad_unmute(devc);
1120 devc->xfer_count = cnt;
1121 devc->audio_mode |= PCM_ENABLE_INPUT;
1122 devc->intr_active = 1;
1123 spin_unlock_irqrestore(&devc->lock,flags);
1131 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1134 ad_mute(devc);
1136 spin_lock_irqsave(&devc->lock,flags);
1142 ad_enter_MCE(devc); /* Enables changes to the format select reg */
1144 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* Use alternate speed select registers */
1148 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1149 ad_write(devc, 23, portc->speed & 0xff); /* Speed LSB */
1151 old_fs = ad_read(devc, 8);
1153 if (devc->model == MD_4232 || devc->model >= MD_4236)
1155 tmp = ad_read(devc, 16);
1156 ad_write(devc, 16, tmp | 0x30);
1158 if (devc->model == MD_IWAVE)
1159 ad_write(devc, 17, 0xc2); /* Disable variable frequency select */
1161 ad_write(devc, 8, fs);
1168 while (timeout < 100 && inb(devc->base) != 0x80)
1171 while (timeout < 10000 && inb(devc->base) == 0x80)
1174 if (devc->model >= MD_4232)
1175 ad_write(devc, 16, tmp & ~0x30);
1177 ad_leave_MCE(devc); /*
1180 spin_unlock_irqrestore(&devc->lock,flags);
1181 devc->xfer_count = 0;
1184 if (dev == timer_installed && devc->timer_running)
1199 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1202 if (devc->audio_mode)
1205 spin_lock_irqsave(&devc->lock,flags);
1211 ad_enter_MCE(devc); /* Enables changes to the format select reg */
1213 if ((devc->model == MD_1845) || (devc->model == MD_1845_SSCAPE)) /* Use alternate speed select registers */
1217 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1218 ad_write(devc, 23, portc->speed & 0xff); /* Speed LSB */
1220 if (devc->model == MD_4232)
1222 tmp = ad_read(devc, 16);
1223 ad_write(devc, 16, tmp | 0x30);
1225 if (devc->model == MD_IWAVE)
1226 ad_write(devc, 17, 0xc2); /* Disable variable frequency select */
1232 if (devc->model != MD_1848)
1234 old_fs = ad_read(devc, 28);
1235 ad_write(devc, 28, fs);
1242 while (timeout < 100 && inb(devc->base) != 0x80)
1246 while (timeout < 10000 && inb(devc->base) == 0x80)
1249 if (devc->model != MD_1848 && devc->model != MD_1845 && devc->model != MD_1845_SSCAPE)
1256 unsigned char tmp = portc->speed_bits | (ad_read(devc, 8) & 0xf0);
1258 ad_write(devc, 8, tmp);
1263 while (timeout < 100 && inb(devc->base) != 0x80)
1267 while (timeout < 10000 && inb(devc->base) == 0x80)
1274 old_fs = ad_read(devc, 8);
1275 ad_write(devc, 8, fs);
1280 while (timeout < 100 && inb(devc->base) != 0x80)
1283 while (timeout < 10000 && inb(devc->base) == 0x80)
1287 if (devc->model == MD_4232)
1288 ad_write(devc, 16, tmp & ~0x30);
1290 ad_leave_MCE(devc); /*
1293 spin_unlock_irqrestore(&devc->lock,flags);
1294 devc->xfer_count = 0;
1297 if (dev == timer_installed && devc->timer_running)
1311 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1314 unsigned char bits = ad_read(devc, 9);
1321 devc->audio_mode = 0;
1326 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1329 if (!(ad_read(devc, 9) & 0x02))
1332 spin_lock_irqsave(&devc->lock,flags);
1334 ad_mute(devc);
1343 if (ad_read(devc, 11) & 0x10)
1345 ad_write(devc, 9, ad_read(devc, 9) & ~0x02); /* Stop capture */
1349 devc->audio_mode &= ~PCM_ENABLE_INPUT;
1352 outb(0, io_Status(devc)); /* Clear interrupt status */
1353 outb(0, io_Status(devc)); /* Clear interrupt status */
1355 devc->audio_mode &= ~PCM_ENABLE_INPUT;
1357 spin_unlock_irqrestore(&devc->lock,flags);
1362 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1365 if (!(ad_read(devc, 9) & 0x01))
1368 spin_lock_irqsave(&devc->lock,flags);
1370 ad_mute(devc);
1378 if (ad_read(devc, 11) & 0x10)
1380 ad_write(devc, 9, ad_read(devc, 9) & ~0x01); /* Stop playback */
1385 devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1388 outb((0), io_Status(devc)); /* Clear interrupt status */
1389 outb((0), io_Status(devc)); /* Clear interrupt status */
1391 devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1393 spin_unlock_irqrestore(&devc->lock,flags);
1398 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1403 spin_lock_irqsave(&devc->lock,flags);
1404 state &= devc->audio_mode;
1406 tmp = old = ad_read(devc, 9);
1422 /* ad_mute(devc); */
1425 ad_write(devc, 9, tmp);
1426 ad_unmute(devc);
1428 spin_unlock_irqrestore(&devc->lock,flags);
1431 static void ad1848_init_hw(ad1848_info * devc)
1472 if(devc->model >= MD_4236)
1476 ad_write(devc, i, init_values[i]);
1479 ad_mute(devc); /* Initialize some variables */
1480 ad_unmute(devc); /* Leave it unmuted now */
1482 if (devc->model > MD_1848)
1484 if (devc->model == MD_1845_SSCAPE)
1485 ad_write(devc, 12, ad_read(devc, 12) | 0x50);
1487 ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */
1489 if (devc->model == MD_IWAVE)
1490 ad_write(devc, 12, 0x6c); /* Select codec mode 3 */
1492 if (devc->model != MD_1845_SSCAPE)
1494 ad_write(devc, i, init_values[i]);
1496 if (devc->model == MD_IWAVE)
1497 ad_write(devc, 16, 0x30); /* Playback and capture counters enabled */
1499 if (devc->model > MD_1848)
1501 if (devc->audio_flags & DMA_DUPLEX)
1502 ad_write(devc, 9, ad_read(devc, 9) & ~0x04); /* Dual DMA mode */
1504 ad_write(devc, 9, ad_read(devc, 9) | 0x04); /* Single DMA mode */
1506 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
1507 ad_write(devc, 27, ad_read(devc, 27) | 0x08); /* Alternate freq select enabled */
1509 if (devc->model == MD_IWAVE)
1511 ad_write(devc, 12, 0x6c); /* Select codec mode 3 */
1512 ad_write(devc, 16, 0x30); /* Playback and capture counters enabled */
1513 ad_write(devc, 17, 0xc2); /* Alternate feature enable */
1518 devc->audio_flags &= ~DMA_DUPLEX;
1519 ad_write(devc, 9, ad_read(devc, 9) | 0x04); /* Single DMA mode */
1521 ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */
1524 outb((0), io_Status(devc)); /* Clear pending interrupts */
1530 ad_enter_MCE(devc); /* In case the bit was off */
1531 ad_leave_MCE(devc);
1533 ad1848_mixer_reset(devc);
1539 ad1848_info *devc = &adev_info[nr_ad1848_devs];
1577 spin_lock_init(&devc->lock);
1578 devc->base = io_base;
1579 devc->irq_ok = 0;
1580 devc->timer_running = 0;
1581 devc->MCE_bit = 0x40;
1582 devc->irq = 0;
1583 devc->open_mode = 0;
1584 devc->chip_name = devc->name = "AD1848";
1585 devc->model = MD_1848; /* AD1848 or CS4248 */
1586 devc->levels = NULL;
1587 devc->debug_flag = 0;
1599 if (inb(devc->base) == 0xff)
1612 unsigned char x = inb(devc->base);
1620 if (inb(devc->base) == 0x80) /* Not ready. Let's wait */
1621 ad_leave_MCE(devc);
1623 if ((inb(devc->base) & 0x80) != 0x00) /* Not a AD1848 */
1625 DDB(printk("ad1848 detect error - step A (%02x)\n", (int) inb(devc->base)));
1636 ad_write(devc, 0, 0xaa);
1637 ad_write(devc, 1, 0x45); /* 0x55 with bit 0x10 clear */
1639 if ((tmp1 = ad_read(devc, 0)) != 0xaa || (tmp2 = ad_read(devc, 1)) != 0x45)
1650 ad_write(devc, 0, 0x45);
1651 ad_write(devc, 1, 0xaa);
1653 if ((tmp1 = ad_read(devc, 0)) != 0x45 || (tmp2 = ad_read(devc, 1)) != 0xaa)
1670 tmp = ad_read(devc, 12);
1671 ad_write(devc, 12, (~tmp) & 0x0f);
1673 if ((tmp & 0x0f) != ((tmp1 = ad_read(devc, 12)) & 0x0f))
1699 ad_write(devc, 12, 0); /* Mode2=disabled */
1703 if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16)))
1722 ad_write(devc, 12, 0x40); /* Set mode2, clear 0x80 */
1728 tmp1 = ad_read(devc, 12);
1734 devc->chip_name = "CS4248"; /* Our best knowledge just now */
1745 ad_write(devc, 16, 0); /* Set I16 to known value */
1747 ad_write(devc, 0, 0x45);
1748 if ((tmp1 = ad_read(devc, 16)) != 0x45) /* No change -> CS4231? */
1750 ad_write(devc, 0, 0xaa);
1751 if ((tmp1 = ad_read(devc, 16)) == 0xaa) /* Rotten bits? */
1762 tmp1 = ad_read(devc, 25); /* Original bits */
1763 ad_write(devc, 25, ~tmp1); /* Invert all bits */
1764 if ((ad_read(devc, 25) & 0xe7) == (tmp1 & 0xe7))
1772 devc->chip_name = "CS4231";
1773 devc->model = MD_4231;
1781 id = ad_read(devc, 25);
1783 id = ad_read(devc, 25);
1785 id = ad_read(devc, 25);
1786 DDB(printk("ad1848_detect() - step J (%02x/%02x)\n", id, ad_read(devc, 25)));
1796 unsigned char tmp = ad_read(devc, 23);
1797 ad_write(devc, 23, ~tmp);
1801 devc->model = MD_IWAVE;
1802 devc->chip_name = "IWave";
1804 else if (ad_read(devc, 23) != tmp) /* AD1845 ? */
1806 devc->chip_name = "AD1845";
1807 devc->model = MD_1845;
1813 devc->chip_name = "CS4248";
1814 devc->model = MD_1848;
1815 ad_write(devc, 12, ad_read(devc, 12) & ~0x40); /* Mode2 off */
1817 ad_write(devc, 23, tmp); /* Restore */
1825 ad_write(devc, 12, ad_read(devc, 12) | 0x60); /* switch to mode 3 */
1826 ad_write(devc, 23, 0x9c); /* select extended register 25 */
1827 xid = inb(io_Indexed_Data(devc));
1828 ad_write(devc, 12, ad_read(devc, 12) & ~0x60); /* back to mode 0 */
1832 devc->chip_name = "CS4237B(B)";
1833 devc->model = MD_42xB;
1837 devc->chip_name = "CS4238";
1838 devc->model = MD_42xB;
1841 devc->chip_name = "CS4238B";
1842 devc->model = MD_42xB;
1845 devc->chip_name = "CS4236B";
1846 devc->model = MD_4236;
1849 devc->chip_name = "CS4237B";
1850 devc->model = MD_42xB;
1853 devc->chip_name = "CS4235";
1854 devc->model = MD_4235;
1857 devc->chip_name = "CS4239";
1858 devc->model = MD_4239;
1862 devc->chip_name = "CS42xx";
1863 devc->model = MD_4232;
1870 devc->chip_name = "CS4232";
1871 devc->model = MD_4232;
1877 devc->chip_name = "CS4231A";
1878 devc->model = MD_4231A;
1882 devc->chip_name = "CS4321";
1883 devc->model = MD_4231;
1888 DDB(printk("ad1848: I25 = %02x/%02x\n", ad_read(devc, 25), ad_read(devc, 25) & 0xe7));
1891 devc->chip_name = "82C930";
1892 devc->model = MD_C930;
1896 devc->chip_name = "CS4231";
1897 devc->model = MD_4231;
1902 ad_write(devc, 25, tmp1); /* Restore bits */
1918 if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16))) {
1921 devc->chip_name = "SoundPro CMI 8330";
1930 if (devc->model != MD_1848)
1935 if (devc->model == MD_1848 && ad1847_flag)
1936 devc->chip_name = "AD1847";
1940 devc->model = MD_1845_SSCAPE;
1958 ad1848_info *devc = &adev_info[nr_ad1848_devs];
1962 devc->irq = (irq > 0) ? irq : 0;
1963 devc->open_mode = 0;
1964 devc->timer_ticks = 0;
1965 devc->dma1 = dma_playback;
1966 devc->dma2 = dma_capture;
1967 devc->subtype = cfg.card_subtype;
1968 devc->audio_flags = DMA_AUTOMODE;
1969 devc->playback_dev = devc->record_dev = 0;
1971 devc->name = name;
1975 "%s (%s)", name, devc->chip_name);
1978 "Generic audio codec (%s)", devc->chip_name);
1980 rename_region(ports, devc->name);
1982 conf_printf2(dev_name, devc->base, devc->irq, dma_playback, dma_capture);
1984 if (devc->model == MD_1848 || devc->model == MD_C930)
1985 devc->audio_flags |= DMA_HARDSTOP;
1987 if (devc->model > MD_1848)
1989 if (devc->dma1 == devc->dma2 || devc->dma2 == -1 || devc->dma1 == -1)
1990 devc->audio_flags &= ~DMA_DUPLEX;
1992 devc->audio_flags |= DMA_DUPLEX;
1997 release_region(devc->base, 4);
2005 devc->audio_flags,
2006 ad_format_mask[devc->model],
2007 devc,
2011 release_region(devc->base, 4);
2024 ad1848_init_hw(devc);
2028 devc->dev_no = my_dev;
2029 if (request_irq(devc->irq, adintr, 0, devc->name,
2034 devc->irq = 0;
2036 if (capabilities[devc->model].flags & CAP_F_TIMER)
2040 unsigned char tmp = ad_read(devc, 16);
2043 devc->timer_ticks = 0;
2045 ad_write(devc, 21, 0x00); /* Timer MSB */
2046 ad_write(devc, 20, 0x10); /* Timer LSB */
2048 ad_write(devc, 16, tmp | 0x40); /* Enable timer */
2049 for (x = 0; x < 100000 && devc->timer_ticks == 0; x++);
2050 ad_write(devc, 16, tmp & ~0x40); /* Disable timer */
2052 if (devc->timer_ticks == 0)
2057 devc->irq_ok = 1;
2060 devc->irq_ok = 1;
2064 devc->irq_ok = 1; /* Couldn't test. assume it's OK */
2066 irq2dev[-irq] = devc->dev_no = my_dev;
2069 if ((capabilities[devc->model].flags & CAP_F_TIMER) &&
2070 devc->irq_ok)
2076 if (sound_alloc_dma(dma_playback, devc->name))
2080 if (sound_alloc_dma(dma_capture, devc->name))
2088 devc)) >= 0)
2099 ad1848_info *devc;
2105 devc = &adev_info[nr_ad1848_devs - 1];
2110 if (devc->model != MD_1845 || devc->model != MD_1845_SSCAPE)
2112 spin_lock_irqsave(&devc->lock,flags);
2113 ad_enter_MCE(devc);
2114 ad_write(devc, 29, (ad_read(devc, 29) & 0x1f) | (arg << 5));
2115 ad_leave_MCE(devc);
2116 spin_unlock_irqrestore(&devc->lock,flags);
2127 if (!(devc->supported_devices & (1 << o)) &&
2128 !(devc->supported_rec_devices & (1 << o)))
2133 ad1848_mixer_set(devc, o, 0); /* Shut up it */
2134 devc->supported_devices &= ~(1 << o);
2135 devc->supported_rec_devices &= ~(1 << o);
2143 devc->mixer_reroute[n] = o; /* Rename the control */
2144 if (devc->supported_devices & (1 << o))
2145 devc->supported_devices |= (1 << n);
2146 if (devc->supported_rec_devices & (1 << o))
2147 devc->supported_rec_devices |= (1 << n);
2149 devc->supported_devices &= ~(1 << o);
2150 devc->supported_rec_devices &= ~(1 << o);
2160 ad1848_info *devc = NULL;
2162 for (i = 0; devc == NULL && i < nr_ad1848_devs; i++)
2166 devc = &adev_info[i];
2167 dev = devc->dev_no;
2171 if (devc != NULL)
2174 release_region(devc->base, 4);
2178 if (devc->irq > 0) /* There is no point in freeing irq, if it wasn't allocated */
2179 free_irq(devc->irq, (void *)(long)devc->dev_no);
2187 mixer = audio_devs[devc->dev_no]->mixer_dev;
2202 ad1848_info *devc;
2209 devc = (ad1848_info *) audio_devs[dev]->devc;
2213 status = inb(io_Status(devc));
2217 if (devc->model == MD_1848)
2218 outb((0), io_Status(devc)); /* Clear interrupt status */
2222 if (devc->model == MD_C930)
2225 spin_lock(&devc->lock);
2234 spin_unlock(&devc->lock);
2238 else if (devc->model != MD_1848)
2240 spin_lock(&devc->lock);
2241 alt_stat = ad_read(devc, 24);
2242 ad_write(devc, 24, ad_read(devc, 24) & ~alt_stat); /* Selective ack */
2243 spin_unlock(&devc->lock);
2246 if ((devc->open_mode & OPEN_READ) && (devc->audio_mode & PCM_ENABLE_INPUT) && (alt_stat & 0x20))
2248 DMAbuf_inputintr(devc->record_dev);
2250 if ((devc->open_mode & OPEN_WRITE) && (devc->audio_mode & PCM_ENABLE_OUTPUT) &&
2253 DMAbuf_outputintr(devc->playback_dev, 1);
2255 if (devc->model != MD_1848 && (alt_stat & 0x40)) /* Timer interrupt */
2257 devc->timer_ticks++;
2259 if (timer_installed == dev && devc->timer_running)
2270 if (inb(io_Status(devc)) & 0x01 && cnt++ < 4)
2704 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
2708 spin_lock_irqsave(&devc->lock,flags);
2721 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
2723 else if (ad_read(devc, 8) & 0x01)
2736 ad_write(devc, 21, (divider >> 8) & 0xff); /* Set upper bits */
2737 ad_write(devc, 20, divider & 0xff); /* Set lower bits */
2738 ad_write(devc, 16, ad_read(devc, 16) | 0x40); /* Start the timer */
2739 devc->timer_running = 1;
2740 spin_unlock_irqrestore(&devc->lock,flags);
2759 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
2761 spin_lock_irqsave(&devc->lock,flags);
2762 ad_write(devc, 16, ad_read(devc, 16) & ~0x40);
2763 devc->timer_running = 0;
2764 spin_unlock_irqrestore(&devc->lock,flags);
2770 ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
2775 spin_lock_irqsave(&devc->lock,flags);
2776 ad_write(devc, 16, ad_read(devc, 16) | 0x40);
2777 devc->timer_running = 1;
2778 spin_unlock_irqrestore(&devc->lock,flags);