Lines Matching defs:bridgereg_t
52 typedef u32 bridgereg_t;
89 bridgereg_t _pad_000058;
90 bridgereg_t b_wid_aux_err; /* 0x00005C */
91 bridgereg_t _pad_000060;
92 bridgereg_t b_wid_resp_upper; /* 0x000064 */
93 bridgereg_t _pad_000068;
94 bridgereg_t b_wid_resp_lower; /* 0x00006C */
95 bridgereg_t _pad_000070;
96 bridgereg_t b_wid_tst_pin_ctrl; /* 0x000074 */
97 bridgereg_t _pad_000078[2];
100 bridgereg_t _pad_000080;
101 bridgereg_t b_dir_map; /* 0x000084 */
102 bridgereg_t _pad_000088[2];
105 bridgereg_t _pad_000090;
106 bridgereg_t b_ram_perr; /* 0x000094 */
107 bridgereg_t _pad_000098[2];
110 bridgereg_t _pad_0000A0;
111 bridgereg_t b_arb; /* 0x0000A4 */
112 bridgereg_t _pad_0000A8[2];
115 bridgereg_t _pad_0000B0;
116 bridgereg_t b_nic; /* 0x0000B4 */
117 bridgereg_t _pad_0000B8[2];
120 bridgereg_t _pad_0000C0;
121 bridgereg_t b_bus_timeout; /* 0x0000C4 */
124 bridgereg_t _pad_0000C8;
125 bridgereg_t b_pci_cfg; /* 0x0000CC */
126 bridgereg_t _pad_0000D0;
127 bridgereg_t b_pci_err_upper; /* 0x0000D4 */
128 bridgereg_t _pad_0000D8;
129 bridgereg_t b_pci_err_lower; /* 0x0000DC */
130 bridgereg_t _pad_0000E0[8];
135 bridgereg_t _pad_000100;
136 bridgereg_t b_int_status; /* 0x000104 */
137 bridgereg_t _pad_000108;
138 bridgereg_t b_int_enable; /* 0x00010C */
139 bridgereg_t _pad_000110;
140 bridgereg_t b_int_rst_stat; /* 0x000114 */
141 bridgereg_t _pad_000118;
142 bridgereg_t b_int_mode; /* 0x00011C */
143 bridgereg_t _pad_000120;
144 bridgereg_t b_int_device; /* 0x000124 */
145 bridgereg_t _pad_000128;
146 bridgereg_t b_int_host_err; /* 0x00012C */
149 bridgereg_t __pad; /* 0x0001{30,,,68} */
150 bridgereg_t addr; /* 0x0001{34,,,6C} */
153 bridgereg_t _pad_000170[36];
157 bridgereg_t __pad; /* 0x0002{00,,,38} */
158 bridgereg_t reg; /* 0x0002{04,,,3C} */
162 bridgereg_t __pad; /* 0x0002{40,,,78} */
163 bridgereg_t reg; /* 0x0002{44,,,7C} */
167 bridgereg_t __pad; /* 0x0002{80,,,88} */
168 bridgereg_t reg; /* 0x0002{84,,,8C} */
173 bridgereg_t _pad_000290;
174 bridgereg_t b_resp_status; /* 0x000294 */
175 bridgereg_t _pad_000298;
176 bridgereg_t b_resp_clear; /* 0x00029C */
178 bridgereg_t _pad_0002A0[24];
186 bridgereg_t _p_pad;
187 bridgereg_t rd; /* read-only */
195 bridgereg_t _p_pad;
196 bridgereg_t rd; /* read-only */