Lines Matching defs:SiS_Pr
83 InitCommonPointer(struct SiS_Private *SiS_Pr)
85 SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable;
86 SiS_Pr->SiS_StResInfo = SiS_StResInfo;
87 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
88 SiS_Pr->SiS_StandTable = SiS_StandTable;
90 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
91 SiS_Pr->SiS_PALTiming = SiS_PALTiming;
92 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
93 SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
95 SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
96 SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
97 SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
99 SiS_Pr->SiS_StPALData = SiS_StPALData;
100 SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
101 SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
102 SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
103 SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
104 SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
105 SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
106 SiS_Pr->SiS_St525iData = SiS_StNTSCData;
107 SiS_Pr->SiS_St525pData = SiS_St525pData;
108 SiS_Pr->SiS_St750pData = SiS_St750pData;
109 SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
110 SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
111 SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
113 SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
114 SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
116 SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
117 SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
118 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
119 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
120 SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
121 SiS_Pr->SiS_LCD1280x854Data = SiS_LCD1280x854Data;
122 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
123 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
124 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
125 SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
126 SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
127 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
128 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
130 SiS_Pr->SiS_LVDS320x240Data_1 = SiS_LVDS320x240Data_1;
131 SiS_Pr->SiS_LVDS320x240Data_2 = SiS_LVDS320x240Data_2;
132 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
133 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
134 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
135 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
137 SiS_Pr->SiS_LVDSCRT1320x240_1 = SiS_LVDSCRT1320x240_1;
138 SiS_Pr->SiS_LVDSCRT1320x240_2 = SiS_LVDSCRT1320x240_2;
139 SiS_Pr->SiS_LVDSCRT1320x240_2_H = SiS_LVDSCRT1320x240_2_H;
140 SiS_Pr->SiS_LVDSCRT1320x240_3 = SiS_LVDSCRT1320x240_3;
141 SiS_Pr->SiS_LVDSCRT1320x240_3_H = SiS_LVDSCRT1320x240_3_H;
142 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
143 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
145 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
146 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
148 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
149 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
155 InitTo300Pointer(struct SiS_Private *SiS_Pr)
157 InitCommonPointer(SiS_Pr);
159 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
160 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
161 SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
162 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
163 if(SiS_Pr->ChipType == SIS_300) {
164 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
166 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
168 SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
169 SiS_Pr->SiS_VBVCLKData = (struct SiS_VBVCLKData *)SiS300_VCLKData;
171 SiS_Pr->SiS_SR15 = SiS300_SR15;
173 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
174 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
176 SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
177 SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
178 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
179 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
181 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
182 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
183 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
185 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
186 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
187 SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
188 SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
189 SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
190 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
191 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
193 SiS_Pr->SiS_LVDS848x480Data_1 = SiS300_LVDS848x480Data_1;
194 SiS_Pr->SiS_LVDS848x480Data_2 = SiS300_LVDS848x480Data_2;
195 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS300_LVDSBARCO1024Data_1;
196 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS300_LVDSBARCO1366Data_1;
197 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS300_LVDSBARCO1366Data_2;
199 SiS_Pr->SiS_PanelType04_1a = SiS300_PanelType04_1a;
200 SiS_Pr->SiS_PanelType04_2a = SiS300_PanelType04_2a;
201 SiS_Pr->SiS_PanelType04_1b = SiS300_PanelType04_1b;
202 SiS_Pr->SiS_PanelType04_2b = SiS300_PanelType04_2b;
204 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
205 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
206 SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
207 SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
208 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
209 SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
210 SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
211 SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
212 SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
213 SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
214 SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
215 SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
216 SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
217 SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
218 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
219 SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
220 SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
221 SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
222 SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
223 SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
224 SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
225 SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
226 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
232 InitTo310Pointer(struct SiS_Private *SiS_Pr)
234 InitCommonPointer(SiS_Pr);
236 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
237 SiS_Pr->SiS_RefIndex = SiS310_RefIndex;
238 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
239 if(SiS_Pr->ChipType >= SIS_340) {
240 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 + XGI */
241 } else if(SiS_Pr->ChipType >= SIS_761) {
242 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
243 } else if(SiS_Pr->ChipType >= SIS_760) {
244 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
245 } else if(SiS_Pr->ChipType >= SIS_661) {
246 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
247 } else if(SiS_Pr->ChipType == SIS_330) {
248 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
249 } else if(SiS_Pr->ChipType > SIS_315PRO) {
250 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
252 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
254 if(SiS_Pr->ChipType >= SIS_340) {
255 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
257 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
259 SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
260 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
262 SiS_Pr->SiS_SR15 = SiS310_SR15;
264 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
265 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
267 SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
268 SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
269 SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
270 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
272 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
274 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
275 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
276 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
277 SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
278 SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
279 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
280 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
282 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
283 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
284 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
285 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
286 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
288 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
289 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
290 SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
291 SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
292 SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
293 SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
294 SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
295 SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
296 SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
298 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
299 SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
300 SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
301 SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
302 SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
303 SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
304 SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
305 SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
306 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
311 SiSInitPtr(struct SiS_Private *SiS_Pr)
313 if(SiS_Pr->ChipType < SIS_315H) {
315 InitTo300Pointer(SiS_Pr);
321 InitTo310Pointer(SiS_Pr);
959 SiS_DisplayOn(struct SiS_Private *SiS_Pr)
961 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
965 SiS_DisplayOff(struct SiS_Private *SiS_Pr)
967 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
976 SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
978 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
979 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
980 SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
981 SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
982 SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
983 SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
984 SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
985 SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
986 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
987 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
988 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
989 SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
990 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
991 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
992 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
993 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
994 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
995 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
996 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
997 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;
998 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
999 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
1007 SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
1013 SiS_Pr->SiS_SensibleSR11 = false;
1014 SiS_Pr->SiS_MyCR63 = 0x63;
1015 if(SiS_Pr->ChipType >= SIS_330) {
1016 SiS_Pr->SiS_MyCR63 = 0x53;
1017 if(SiS_Pr->ChipType >= SIS_661) {
1018 SiS_Pr->SiS_SensibleSR11 = true;
1024 SiS_Pr->SiS_SysFlags = 0;
1025 if(SiS_Pr->ChipType == SIS_650) {
1026 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
1027 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
1028 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1029 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
1030 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1036 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1041 SiS_Pr->SiS_SysFlags |= SF_Is651;
1047 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1049 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
1050 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
1051 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1055 SiS_Pr->SiS_SysFlags |= SF_Is652;
1058 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1064 if(SiS_Pr->ChipType >= SIS_760 && SiS_Pr->ChipType <= SIS_761) {
1065 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x30) {
1066 SiS_Pr->SiS_SysFlags |= SF_760LFB;
1068 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0xf0) {
1069 SiS_Pr->SiS_SysFlags |= SF_760UMA;
1079 SiSInitPCIetc(struct SiS_Private *SiS_Pr)
1081 switch(SiS_Pr->ChipType) {
1092 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1098 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
1116 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1123 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
1128 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1133 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0x60,0x40);
1149 SiSSetLVDSetc(struct SiS_Private *SiS_Pr)
1153 SiS_Pr->SiS_IF_DEF_LVDS = 0;
1154 SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
1155 SiS_Pr->SiS_IF_DEF_CH70xx = 0;
1156 SiS_Pr->SiS_IF_DEF_CONEX = 0;
1158 SiS_Pr->SiS_ChrontelInit = 0;
1160 if(SiS_Pr->ChipType == XGI_20) return;
1163 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1166 switch(SiS_Pr->ChipType) {
1171 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1172 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1173 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
1176 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
1177 SiS_Pr->SiS_IF_DEF_CH70xx = 1;
1186 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1187 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1188 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1198 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5;
1199 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1200 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1201 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
1214 SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable)
1216 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
1220 SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable)
1222 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
1230 SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1233 if(SiS_Pr->UseCustomMode) {
1234 return SiS_Pr->CModeFlag;
1236 return SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1238 return SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1247 SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr)
1249 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1252 if(SiS_Pr->ChipType >= XGI_20) {
1255 } else if(SiS_Pr->ChipType >= SIS_761) {
1258 } else if(SiS_Pr->ChipType >= SIS_661) {
1287 SiSDetermineROMUsage(struct SiS_Private *SiS_Pr)
1289 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1292 SiS_Pr->SiS_UseROM = false;
1293 SiS_Pr->SiS_ROMNew = false;
1294 SiS_Pr->SiS_PWDOffset = 0;
1296 if(SiS_Pr->ChipType >= XGI_20) return;
1298 if((ROMAddr) && (SiS_Pr->UseROM)) {
1299 if(SiS_Pr->ChipType == SIS_300) {
1305 SiS_Pr->SiS_UseROM = true;
1306 } else if(SiS_Pr->ChipType < SIS_315H) {
1310 SiS_Pr->SiS_UseROM = true;
1313 SiS_Pr->SiS_UseROM = true;
1314 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) {
1315 SiS_Pr->SiS_EMIOffset = 14;
1316 SiS_Pr->SiS_PWDOffset = 17;
1317 SiS_Pr->SiS661LCD2TableSize = 36;
1321 SiS_Pr->SiS661LCD2TableSize = 32;
1323 SiS_Pr->SiS661LCD2TableSize = 34;
1325 SiS_Pr->SiS661LCD2TableSize = 36;
1328 SiS_Pr->SiS661LCD2TableSize = 38; /* UMC data layout abandoned at 2.05.00 */
1329 SiS_Pr->SiS_EMIOffset = 16;
1330 SiS_Pr->SiS_PWDOffset = 19;
1343 SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
1348 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
1350 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1351 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
1353 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1357 SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
1362 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
1364 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1365 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
1367 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1371 SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
1373 SiS_SetSegRegLower(SiS_Pr, value);
1374 SiS_SetSegRegUpper(SiS_Pr, value);
1378 SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
1380 SiS_SetSegmentReg(SiS_Pr, 0);
1384 SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
1390 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
1391 SiS_SetSegmentReg(SiS_Pr, value);
1395 SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
1397 SiS_SetSegmentRegOver(SiS_Pr, 0);
1401 SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
1403 if((IS_SIS65x) || (SiS_Pr->ChipType >= SIS_661)) {
1404 SiS_ResetSegmentReg(SiS_Pr);
1405 SiS_ResetSegmentRegOver(SiS_Pr);
1417 SiS_GetVBType(struct SiS_Private *SiS_Pr)
1422 SiS_Pr->SiS_VBType = 0;
1424 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
1427 if(SiS_Pr->ChipType == XGI_20)
1430 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1435 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
1438 SiS_Pr->SiS_VBType = VB_SIS302B;
1441 SiS_Pr->SiS_VBType = VB_SIS301C;
1443 SiS_Pr->SiS_VBType = VB_SIS301B;
1445 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
1446 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
1448 SiS_Pr->SiS_VBType = VB_SIS301;
1451 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
1453 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
1454 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
1455 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
1457 SiS_Pr->SiS_VBType = VB_SIS301LV;
1460 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) {
1461 p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
1462 p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
1463 p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
1464 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
1465 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
1466 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
1467 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
1468 SiS_Pr->SiS_VBType |= VB_UMC;
1470 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
1471 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
1472 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
1482 SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1485 unsigned short AdapterMemSize = SiS_Pr->VideoMemorySize / (1024*1024);
1486 unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
1502 SiS_Get310DRAMType(struct SiS_Private *SiS_Pr)
1506 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
1507 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
1509 if(SiS_Pr->ChipType >= XGI_20) {
1512 } else if(SiS_Pr->ChipType >= SIS_340) {
1515 } if(SiS_Pr->ChipType >= SIS_661) {
1516 if(SiS_Pr->SiS_ROMNew) {
1517 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
1519 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
1522 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
1524 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
1525 if(SiS_Pr->ChipType == SIS_330) {
1527 switch(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30) {
1544 SiS_GetMCLK(struct SiS_Private *SiS_Pr)
1546 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1549 index = SiS_Get310DRAMType(SiS_Pr);
1550 if(SiS_Pr->ChipType >= SIS_661) {
1551 if(SiS_Pr->SiS_ROMNew) {
1554 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1556 return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
1558 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1569 SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1571 unsigned char SISIOMEMTYPE *memaddr = SiS_Pr->VideoMemoryAddress;
1572 unsigned int memsize = SiS_Pr->VideoMemorySize;
1578 if(SiS_Pr->SiS_ModeType >= ModeEGA) {
1585 } else if(SiS_Pr->SiS_ModeType < ModeCGA) {
1599 SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
1602 unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
1609 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break;
1610 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return false;
1627 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break;
1628 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return false;
1640 SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
1645 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
1647 if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
1658 SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1660 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1662 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_WIDE;
1664 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_NORM;
1667 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK;
1672 SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1674 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1676 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_WIDE;
1678 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_NORM;
1681 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC;
1690 SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1696 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
1697 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
1698 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1699 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
1700 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1701 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
1702 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
1703 if((SiS_Pr->ChipType >= SIS_315H) ||
1704 (SiS_Pr->ChipType == SIS_300)) {
1710 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
1717 SiS_SetLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1719 if(SiS_DoLowModeTest(SiS_Pr, ModeNo)) {
1720 SiS_Pr->SiS_SetFlag |= LowModeTests;
1729 SiS_OpenCRTC(struct SiS_Private *SiS_Pr)
1732 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1733 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
1734 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1736 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
1737 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1738 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1739 if(!SiS_Pr->SiS_ROMNew) {
1740 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1746 SiS_CloseCRTC(struct SiS_Private *SiS_Pr)
1751 SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
1754 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
1762 SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1771 modeflag = SiS_Pr->CModeFlag;
1773 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1775 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1788 SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1793 if(SiS_Pr->UseCustomMode) {
1794 infoflag = SiS_Pr->CInfoFlag;
1795 xres = SiS_Pr->CHDisplay;
1797 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
1798 xres = SiS_Pr->SiS_RefIndex[RRTI].XRes;
1801 colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
1816 SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1821 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03);
1824 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
1827 if((SiS_Pr->SiS_VBType & VB_SISVB) || (SiS_Pr->SiS_IF_DEF_LVDS)) {
1829 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
1830 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) SRdata |= 0x01;
1831 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) SRdata |= 0x01;
1835 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
1838 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
1839 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
1848 SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1852 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
1854 if(SiS_Pr->ChipType < SIS_661) {
1855 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
1856 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
1862 SiS_SetRegByte(SiS_Pr->SiS_P3c2,Miscdata);
1870 SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1876 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
1879 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
1880 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
1883 if(SiS_Pr->ChipType >= SIS_661) {
1884 SiS_OpenCRTC(SiS_Pr);
1886 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
1887 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
1889 } else if( ( (SiS_Pr->ChipType == SIS_630) ||
1890 (SiS_Pr->ChipType == SIS_730) ) &&
1891 (SiS_Pr->ChipRevision >= 0x30) ) {
1892 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
1893 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
1894 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
1905 SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1911 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
1917 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
1918 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata = 0;
1920 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
1921 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1922 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
1923 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1927 if(SiS_Pr->ChipType >= SIS_661) {
1928 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
1929 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1931 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
1932 if(SiS_Pr->ChipType >= SIS_315H) {
1935 if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
1936 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1942 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1946 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
1947 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
1948 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
1951 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
1952 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
1953 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
1955 SiS_GetRegByte(SiS_Pr->SiS_P3da);
1956 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
1957 SiS_GetRegByte(SiS_Pr->SiS_P3da);
1965 SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1971 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
1972 SiS_SetReg(SiS_Pr->SiS_P3ce,i,GRdata);
1975 if(SiS_Pr->SiS_ModeType > ModeVGA) {
1977 SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);
1986 SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1991 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
1994 if(SiS_Pr->ChipType >= SIS_315H) {
1995 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
1998 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
2009 SiS_ResetCRT1VCLK(struct SiS_Private *SiS_Pr)
2011 if(SiS_Pr->ChipType >= SIS_315H) {
2012 if(SiS_Pr->ChipType < SIS_661) {
2013 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
2016 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
2017 (!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) ) {
2022 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x20);
2023 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
2024 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
2025 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2026 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2027 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
2028 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
2029 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2037 SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short RRTI)
2041 if(SiS_Pr->UseCustomMode) {
2042 sync = SiS_Pr->CInfoFlag >> 8;
2044 sync = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag >> 8;
2049 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
2057 SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2063 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2065 if(SiS_Pr->UseCustomMode) {
2067 crt1data = &SiS_Pr->CCRT1CRTC[0];
2071 temp = SiS_GetRefCRT1CRTC(SiS_Pr, RRTI, SiS_Pr->SiS_UseWide);
2074 if((temp == 0x20) && (SiS_Pr->Alternate1600x1200)) temp = 0x57;
2076 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
2081 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
2084 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2087 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2090 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2093 SiS_SetReg(SiS_Pr->SiS_P3c4,j,crt1data[i]);
2096 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,crt1data[16] & 0xE0);
2100 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2102 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2103 SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2107 if(SiS_Pr->ChipType == XGI_20) {
2108 SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1);
2110 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0c,0xfb);
2112 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x05,0xe0,((temp - 1) & 0x1f));
2115 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0e,0x1f,(temp << 5));
2127 SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2132 if(SiS_Pr->UseCustomMode) {
2133 infoflag = SiS_Pr->CInfoFlag;
2135 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2138 DisplayUnit = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2141 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
2143 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,DisplayUnit & 0xFF);
2150 if(SiS_Pr->ChipType == XGI_20) {
2153 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
2161 SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2166 if(SiS_Pr->UseCustomMode) {
2167 clka = SiS_Pr->CSR2B;
2168 clkb = SiS_Pr->CSR2C;
2170 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2171 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) &&
2172 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2174 if((index == 0x21) && (SiS_Pr->Alternate1600x1200)) index = 0x72;
2175 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
2176 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
2178 clka = SiS_Pr->SiS_VCLKData[index].SR2B;
2179 clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
2183 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
2185 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,clka);
2186 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2188 if(SiS_Pr->ChipType >= SIS_315H) {
2190 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
2191 if(SiS_Pr->ChipType == XGI_20) {
2192 unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2194 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,SiS_GetReg(SiS_Pr->SiS_P3c4,0x2b));
2195 clkb = SiS_GetReg(SiS_Pr->SiS_P3c4,0x2c);
2197 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2202 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2212 SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
2220 temp1 = temp2 = (SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x62) >> 1;
2222 (*idx1) = (unsigned short)(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6) & 0x03;
2223 (*idx1) |= (unsigned short)(((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 4) & 0x0c));
2252 SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK,
2258 SiS_GetFIFOThresholdIndex300(SiS_Pr, &idx1, &idx2);
2272 SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK,
2277 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2278 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2286 SiS_SetCRT1FIFO_300(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2296 if(SiS_Pr->UseCustomMode) {
2297 VCLK = SiS_Pr->CSRClock;
2299 index = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2300 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2304 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2307 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A) & 0x07;
2308 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
2310 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xc3;
2311 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,temp);
2314 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1;
2316 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2318 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6;
2320 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,((temp - 1) << 6));
2327 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2331 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2334 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2339 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2343 SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index)
2363 if(SiS_Pr->ChipType == SIS_730) {
2371 SiS_CalcDelay2(struct SiS_Private *SiS_Pr, unsigned char key)
2375 if(SiS_Pr->ChipType == SIS_730) {
2381 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80) index += 12;
2383 return SiS_GetLatencyFactor630(SiS_Pr, index);
2387 SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2418 if(SiS_Pr->UseCustomMode) {
2419 VCLK = SiS_Pr->CSRClock;
2421 data = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2422 VCLK = SiS_Pr->SiS_VCLKData[data].CLOCK;
2426 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A) & 0x07;
2427 MCLK16 = SiS_Pr->SiS_MCLKData_0[data].CLOCK * 16;
2430 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2432 if(SiS_Pr->ChipType == SIS_730) {
2439 templ = SiS_CalcDelay2(SiS_Pr, queuedata[i]) * VCLK * colorth;
2459 if(SiS_Pr->ChipType != SIS_730) i = 9;
2466 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2469 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
2472 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2477 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
2481 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
2486 if(SiS_Pr->ChipType == SIS_730) {
2495 (SiS_Pr->ChipType == SIS_630) &&
2496 (SiS_Pr->ChipRevision >= 0x30) ) {
2505 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
2506 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
2513 if(SiS_Pr->ChipType == SIS_730) {
2527 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
2536 SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2541 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
2543 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2545 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
2546 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
2548 if(SiS_Pr->ChipType >= XGI_20) {
2549 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2550 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2551 } else if(SiS_Pr->ChipType >= SIS_661) {
2553 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2554 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2558 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2559 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2571 SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2577 if(SiS_Pr->UseCustomMode) {
2578 VCLK = SiS_Pr->CSRClock;
2580 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2581 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2585 if(SiS_Pr->ChipType < SIS_315H) {
2588 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2592 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2594 } else if(SiS_Pr->ChipType < XGI_20) {
2597 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2600 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
2606 if(SiS_Pr->ChipType == XGI_20) data &= ~0x04;
2607 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2608 if(SiS_Pr->ChipType != XGI_20) {
2609 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xe7;
2611 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1f,data);
2617 if(SiS_Pr->ChipType >= SIS_661) {
2619 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
2628 if(SiS_Pr->ChipType == SIS_540) {
2632 if(SiS_Pr->ChipType < SIS_315H) {
2633 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
2635 if(SiS_Pr->ChipType > SIS_315PRO) {
2638 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
2645 SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2650 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
2654 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2656 if(SiS_Pr->UseCustomMode) {
2657 infoflag = SiS_Pr->CInfoFlag;
2659 resindex = SiS_GetResInfo(SiS_Pr, ModeNo, ModeIdIndex);
2661 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2666 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
2670 if(SiS_Pr->SiS_ModeType > ModeEGA) {
2672 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
2676 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
2678 if(SiS_Pr->ChipType != SIS_300) {
2682 int hrs = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x04) |
2683 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2)) - 3;
2684 int hto = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x00) |
2685 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0x03) << 8)) + 5;
2688 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,data);
2689 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,((data >> 8) & 0x03));
2693 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
2698 if(SiS_Pr->ChipType == SIS_300) {
2699 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
2701 if(SiS_Pr->ChipType >= XGI_20) data |= 0x20;
2702 if(SiS_Pr->SiS_ModeType == ModeEGA) {
2707 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
2711 if(SiS_Pr->ChipType >= SIS_315H) {
2712 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2715 if(SiS_Pr->ChipType == SIS_315PRO) {
2717 data = SiS_Pr->SiS_SR15[(2 * 4) + SiS_Get310DRAMType(SiS_Pr)];
2718 if(SiS_Pr->SiS_ModeType == ModeText) {
2721 data2 = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI) >> 1;
2723 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
2730 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
2732 } else if((SiS_Pr->ChipType == SIS_330) || (SiS_Pr->SiS_SysFlags & SF_760LFB)) {
2734 data = SiS_Get310DRAMType(SiS_Pr);
2735 if(SiS_Pr->ChipType == SIS_330) {
2736 data = SiS_Pr->SiS_SR15[(2 * 4) + data];
2738 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
2739 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
2742 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
2745 if(SiS_Pr->UseCustomMode) {
2746 data2 = SiS_Pr->CSRClock;
2748 data2 = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2749 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
2752 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
2755 data2 = ((unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) / data2;
2757 if(SiS_Pr->ChipType == SIS_330) {
2758 if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
2782 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
2790 if(SiS_Pr->SiS_ModeType != ModeText) {
2792 if(SiS_Pr->SiS_ModeType != ModeEGA) {
2796 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
2798 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex);
2801 if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) ||
2802 (SiS_Pr->ChipType == XGI_40)) {
2803 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
2804 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
2806 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
2808 } else if(SiS_Pr->ChipType == XGI_20) {
2809 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
2810 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x33);
2812 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x73);
2814 SiS_SetReg(SiS_Pr->SiS_P3d4,0x51,0x02);
2821 SiS_SetupDualChip(struct SiS_Private *SiS_Pr)
2831 SiS_WriteDAC(struct SiS_Private *SiS_Pr, SISIOADDRESS DACData, unsigned short shiftflag,
2847 SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2854 data = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex) & DACInfoFlag;
2866 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
2867 (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
2868 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
2869 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
2870 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
2871 DACAddr = SiS_Pr->SiS_P3c8;
2872 DACData = SiS_Pr->SiS_P3c9;
2875 DACAddr = SiS_Pr->SiS_Part5Port;
2876 DACData = SiS_Pr->SiS_Part5Port + 1;
2904 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[bx], table[si]);
2909 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[si], table[bx]);
2923 SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2927 SiS_Pr->SiS_CRT1Mode = ModeNo;
2929 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
2931 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
2932 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
2933 SiS_DisableBridge(SiS_Pr);
2937 SiS_ResetSegmentRegisters(SiS_Pr);
2939 SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
2940 SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
2941 SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
2942 SiS_SetATTRegs(SiS_Pr, StandTableIndex);
2943 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
2944 SiS_ClearExt1Regs(SiS_Pr, ModeNo);
2945 SiS_ResetCRT1VCLK(SiS_Pr);
2947 SiS_Pr->SiS_SelectCRT2Rate = 0;
2948 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
2952 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
2955 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
2956 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2957 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
2961 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2962 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
2965 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
2967 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2968 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
2972 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
2973 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2974 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2975 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2978 switch(SiS_Pr->ChipType) {
2981 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex);
2986 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, RefreshRateTableIndex);
2991 if(SiS_Pr->ChipType == XGI_20) {
3001 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,sr2b);
3002 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,sr2c);
3003 SiS_SetRegByte(SiS_Pr->SiS_P3c2,(SiS_GetRegByte(SiS_Pr->SiS_P3cc) | 0x0c));
3006 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
3011 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3014 if(SiS_Pr->ChipType == XGI_40) {
3015 SiS_SetupDualChip(SiS_Pr);
3019 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
3022 if(SiS_Pr->SiS_flag_clearbuffer) {
3023 SiS_ClearBuffer(SiS_Pr, ModeNo);
3027 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
3028 SiS_WaitRetrace1(SiS_Pr);
3029 SiS_DisplayOn(SiS_Pr);
3038 SiS_InitVB(struct SiS_Private *SiS_Pr)
3040 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3042 SiS_Pr->Init_P4_0E = 0;
3043 if(SiS_Pr->SiS_ROMNew) {
3044 SiS_Pr->Init_P4_0E = ROMAddr[0x82];
3045 } else if(SiS_Pr->ChipType >= XGI_40) {
3046 if(SiS_Pr->SiS_XGIROM) {
3047 SiS_Pr->Init_P4_0E = ROMAddr[0x80];
3053 SiS_ResetVB(struct SiS_Private *SiS_Pr)
3056 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3060 if(SiS_Pr->SiS_UseROM) {
3061 if(SiS_Pr->ChipType < SIS_330) {
3063 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3064 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3065 } else if(SiS_Pr->ChipType >= SIS_661 && SiS_Pr->ChipType < XGI_20) {
3067 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3068 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3070 } else if(SiS_Pr->ChipType >= XGI_40) {
3072 if(SiS_Pr->SiS_XGIROM) temp |= ROMAddr[0x7e];
3074 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3084 SiS_StrangeStuff(struct SiS_Private *SiS_Pr)
3092 SiS_Pr->ChipType == SIS_340 ||
3093 SiS_Pr->ChipType == XGI_40) {
3094 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
3095 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
3096 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
3097 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x30, 0xfe); /* Fiddle with video regs */
3098 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
3109 SiS_Handle760(struct SiS_Private *SiS_Pr)
3115 if( (SiS_Pr->ChipType != SIS_760) ||
3116 ((SiS_GetReg(SiS_Pr->SiS_P3d4, 0x5c) & 0xf8) != 0x80) ||
3117 (!(SiS_Pr->SiS_SysFlags & SF_760LFB)) ||
3118 (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) )
3122 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74);
3132 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3142 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
3143 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
3159 SiS_SetPitchCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3164 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF));
3165 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay >> 8));
3169 SiS_SetPitchCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3176 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
3178 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
3180 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF));
3181 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8));
3185 SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3192 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
3194 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) {
3200 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3204 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3216 SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, bool dosetpitch)
3219 SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
3222 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3228 SiS_Pr->UseCustomMode = false;
3229 SiS_Pr->CRT1UsesCustomMode = false;
3232 SiS_Pr->SiS_flag_clearbuffer = 0;
3234 if(SiS_Pr->UseCustomMode) {
3238 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3247 SiSInitPtr(SiS_Pr);
3248 SiSRegInit(SiS_Pr, BaseAddr);
3249 SiS_GetSysFlags(SiS_Pr);
3251 SiS_Pr->SiS_VGAINFO = 0x11;
3254 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3258 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
3260 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3262 SiSInitPCIetc(SiS_Pr);
3263 SiSSetLVDSetc(SiS_Pr);
3264 SiSDetermineROMUsage(SiS_Pr);
3266 SiS_UnLockCRT2(SiS_Pr);
3268 if(!SiS_Pr->UseCustomMode) {
3269 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false;
3274 SiS_GetVBType(SiS_Pr);
3277 SiS_InitVB(SiS_Pr);
3278 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3279 if(SiS_Pr->ChipType >= SIS_315H) {
3280 SiS_ResetVB(SiS_Pr);
3281 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3282 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3283 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3285 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3290 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, (SiS_Pr->UseCustomMode) ? 0 : 1);
3291 SiS_SetYPbPr(SiS_Pr);
3292 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3293 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3294 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3298 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) {
3303 SiS_OpenCRTC(SiS_Pr);
3305 if(SiS_Pr->UseCustomMode) {
3306 SiS_Pr->CRT1UsesCustomMode = true;
3307 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3308 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3310 SiS_Pr->CRT1UsesCustomMode = false;
3314 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
3315 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
3316 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3320 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
3321 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3322 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3323 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3324 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3325 SiS_SetCRT2Group(SiS_Pr, RealModeNo);
3329 SiS_HandleCRT1(SiS_Pr);
3331 SiS_StrangeStuff(SiS_Pr);
3333 SiS_DisplayOn(SiS_Pr);
3334 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3337 if(SiS_Pr->ChipType >= SIS_315H) {
3338 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3339 if(!(SiS_IsDualEdge(SiS_Pr))) {
3340 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3346 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3347 if(SiS_Pr->ChipType >= SIS_315H) {
3349 if(!SiS_Pr->SiS_ROMNew) {
3350 if(SiS_IsVAMode(SiS_Pr)) {
3351 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3353 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3357 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3359 if((IS_SIS650) && (SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
3361 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
3362 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
3366 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3367 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3370 } else if((SiS_Pr->ChipType == SIS_630) ||
3371 (SiS_Pr->ChipType == SIS_730)) {
3372 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3380 SiS_SetPitch(SiS_Pr, pScrn);
3388 SiS_CloseCRTC(SiS_Pr);
3390 SiS_Handle760(SiS_Pr);
3394 if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
3407 SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3413 SiS_Pr->UseCustomMode = false;
3418 SiS_Pr->CHDisplay,
3419 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 :
3420 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 :
3421 SiS_Pr->CVDisplay)));
3433 return(SiSSetMode(SiS_Pr, pScrn, ModeNo, true));
3442 SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3445 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3454 SiS_Pr->UseCustomMode = false;
3472 SiSRegInit(SiS_Pr, BaseAddr);
3473 SiSInitPtr(SiS_Pr);
3474 SiS_GetSysFlags(SiS_Pr);
3477 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3479 SiS_Pr->SiS_VGAINFO = 0x11;
3482 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3484 SiSInitPCIetc(SiS_Pr);
3485 SiSSetLVDSetc(SiS_Pr);
3486 SiSDetermineROMUsage(SiS_Pr);
3494 pSiSEnt->CRT2CR30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
3495 pSiSEnt->CRT2CR31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
3496 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3497 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3502 if(SiS_Pr->UseCustomMode) {
3504 unsigned short temptemp = SiS_Pr->CVDisplay;
3506 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3507 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3511 SiS_Pr->CHDisplay, temptemp);
3520 SiS_UnLockCRT2(SiS_Pr);
3522 if(!SiS_Pr->UseCustomMode) {
3523 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false;
3528 SiS_GetVBType(SiS_Pr);
3530 SiS_InitVB(SiS_Pr);
3531 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3532 if(SiS_Pr->ChipType >= SIS_315H) {
3533 SiS_ResetVB(SiS_Pr);
3534 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3535 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3536 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3538 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3543 if(!SiS_Pr->UseCustomMode) {
3544 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 1);
3547 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0);
3549 SiS_SetYPbPr(SiS_Pr);
3550 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3551 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3552 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3554 SiS_ResetSegmentRegisters(SiS_Pr);
3557 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3558 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3559 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3560 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3561 SiS_SetCRT2Group(SiS_Pr, ModeNo);
3564 SiS_StrangeStuff(SiS_Pr);
3566 SiS_DisplayOn(SiS_Pr);
3567 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3569 if(SiS_Pr->ChipType >= SIS_315H) {
3570 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3571 if(!(SiS_IsDualEdge(SiS_Pr))) {
3572 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3577 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3578 if(SiS_Pr->ChipType >= SIS_315H) {
3579 if(!SiS_Pr->SiS_ROMNew) {
3580 if(SiS_IsVAMode(SiS_Pr)) {
3581 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3583 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3587 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3589 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3590 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3592 } else if((SiS_Pr->ChipType == SIS_630) ||
3593 (SiS_Pr->ChipType == SIS_730)) {
3594 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3599 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3601 SiS_Handle760(SiS_Pr);
3612 SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3615 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3625 SiS_Pr->UseCustomMode = false;
3629 unsigned short temptemp = SiS_Pr->CVDisplay;
3631 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3632 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3636 SiS_Pr->CHDisplay, temptemp);
3648 SiSInitPtr(SiS_Pr);
3649 SiSRegInit(SiS_Pr, BaseAddr);
3650 SiS_GetSysFlags(SiS_Pr);
3653 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3655 SiS_Pr->SiS_VGAINFO = 0x11;
3658 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3660 SiSInitPCIetc(SiS_Pr);
3661 SiSSetLVDSetc(SiS_Pr);
3662 SiSDetermineROMUsage(SiS_Pr);
3664 SiS_UnLockCRT2(SiS_Pr);
3666 if(!SiS_Pr->UseCustomMode) {
3667 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false;
3673 SiS_GetVBType(SiS_Pr);
3675 SiS_InitVB(SiS_Pr);
3676 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3677 if(SiS_Pr->ChipType >= SIS_315H) {
3678 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3680 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3686 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0);
3687 SiS_SetYPbPr(SiS_Pr);
3688 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3689 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3690 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3692 SiS_OpenCRTC(SiS_Pr);
3695 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3696 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3697 SiS_SetCRT2Group(SiS_Pr, ModeNo);
3701 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3703 SiS_HandleCRT1(SiS_Pr);
3705 SiS_StrangeStuff(SiS_Pr);
3707 SiS_CloseCRTC(SiS_Pr);
3716 if(SiS_Pr->UseCustomMode) {
3717 SiS_Pr->CRT1UsesCustomMode = true;
3718 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3719 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3721 SiS_Pr->CRT1UsesCustomMode = false;
3730 backupcustom = SiS_Pr->UseCustomMode;
3731 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
3732 backupcr31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
3733 backupcr35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3734 backupcr38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3735 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3738 backupp40d = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0d) & 0x08;
3741 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3742 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,pSiSEnt->CRT2CR30);
3743 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,pSiSEnt->CRT2CR31);
3744 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35);
3745 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38);
3748 SiSBIOSSetModeCRT2(SiS_Pr, pSiSEnt->pScrn_1,
3751 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30);
3752 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31);
3753 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35);
3754 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38);
3755 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3756 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0d, ~0x08, backupp40d);
3758 SiS_Pr->UseCustomMode = backupcustom;
3763 /* Warning: From here, the custom mode entries in SiS_Pr are
3767 SiS_DisplayOn(SiS_Pr);
3768 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3770 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3771 if(SiS_Pr->ChipType >= SIS_315H) {
3772 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3773 } else if((SiS_Pr->ChipType == SIS_630) ||
3774 (SiS_Pr->ChipType == SIS_730)) {
3775 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3779 SiS_Handle760(SiS_Pr);
3796 SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth)
3800 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
3801 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
3802 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
3803 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
3804 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
3805 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
3806 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
3808 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
3809 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
3810 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
3811 | (((SiS_Pr->CVSyncStart - x) & 0x100) >> 6)
3812 | (((SiS_Pr->CVBlankStart- 1) & 0x100) >> 5)
3814 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
3815 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
3816 | (((SiS_Pr->CVSyncStart - x) & 0x200) >> 2);
3818 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
3821 if(SiS_Pr->CHDisplay >= 1600) SiS_Pr->CCRT1CRTC[16] |= 0x60; /* SRE */
3822 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
3825 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart - x) & 0xFF; /* CR10 */
3826 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd - x) & 0x0F) | 0x80; /* CR11 */
3827 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
3828 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
3829 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
3831 SiS_Pr->CCRT1CRTC[13] = /* SRA */
3832 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
3833 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
3834 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
3835 GETBITSTR((SiS_Pr->CVSyncStart -x), 10:10, 3:3) |
3836 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
3837 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
3839 SiS_Pr->CCRT1CRTC[14] = /* SRB */
3840 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
3841 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
3842 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
3843 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
3846 SiS_Pr->CCRT1CRTC[15] = /* SRC */
3847 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
3848 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
3852 SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
3856 unsigned short VGAHDE = SiS_Pr->SiS_VGAHDE;
3860 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
3862 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
3866 SiS_Pr->CHDisplay = VGAHDE;
3867 SiS_Pr->CHBlankStart = VGAHDE;
3869 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
3870 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
3872 if(SiS_Pr->ChipType < SIS_315H) {
3874 tempbx = SiS_Pr->SiS_VGAHT;
3875 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3876 tempbx = SiS_Pr->PanelHT;
3884 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
3885 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
3886 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3887 tempax = SiS_Pr->PanelXRes;
3893 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
3895 if(SiS_Pr->ChipType < SIS_315H) {
3897 if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) {
3898 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1);
3899 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE;
3901 SiS_Pr->CHSyncStart >>= 1;
3902 SiS_Pr->CHSyncEnd >>= 1;
3904 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3905 tempax = (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) >> 1;
3906 tempbx = (SiS_Pr->PanelHRS + 1) & ~1;
3911 SiS_Pr->CHSyncStart = (VGAHDE + tempax + tempbx + 7) & ~7;
3912 tempax = SiS_Pr->PanelHRE + 7;
3914 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + tempax) & ~7;
3916 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE;
3918 SiS_Pr->CHSyncStart >>= 1;
3919 tempax = ((SiS_Pr->CHTotal - SiS_Pr->CHSyncStart) / 3) << 1;
3920 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + tempax;
3922 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + (SiS_Pr->CHTotal / 10) + 7) & ~7;
3923 SiS_Pr->CHSyncStart += 8;
3930 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3931 tempbx = SiS_Pr->PanelXRes;
3935 tempax += SiS_Pr->PanelHRS;
3936 SiS_Pr->CHSyncStart = tempax;
3937 tempax += SiS_Pr->PanelHRE;
3938 SiS_Pr->CHSyncEnd = tempax;
3942 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
3943 tempax = SiS_Pr->SiS_VGAVDE;
3944 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3945 tempax = SiS_Pr->PanelYRes;
3946 } else if(SiS_Pr->ChipType < SIS_315H) {
3949 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
3951 } else if((SiS_Pr->SiS_LCDResInfo == Panel_800x600) ||
3952 (SiS_Pr->SiS_LCDResInfo == Panel_1024x600)) {
3954 tempbx = SiS_Pr->SiS_VGAVT;
3958 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
3960 tempax = SiS_Pr->SiS_VGAVDE;
3961 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3962 tempax += (SiS_Pr->PanelYRes - tempax) >> 1;
3964 tempax += SiS_Pr->PanelVRS;
3965 SiS_Pr->CVSyncStart = tempax;
3966 tempax += SiS_Pr->PanelVRE;
3967 SiS_Pr->CVSyncEnd = tempax;
3968 if(SiS_Pr->ChipType < SIS_315H) {
3969 SiS_Pr->CVSyncStart--;
3970 SiS_Pr->CVSyncEnd--;
3973 SiS_CalcCRRegisters(SiS_Pr, 8);
3974 SiS_Pr->CCRT1CRTC[15] &= ~0xF8;
3975 SiS_Pr->CCRT1CRTC[15] |= (remaining << 4);
3976 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
3978 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
3981 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
3984 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
3987 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
3990 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
3993 tempax = SiS_Pr->CCRT1CRTC[16] & 0xE0;
3994 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1F,tempax);
3996 tempax = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
3998 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
4003 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
4004 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
4005 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
4007 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
4008 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
4009 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
4010 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
4012 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
4013 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
4014 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
4015 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
4016 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
4022 SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,