Lines Matching refs:phy
50 static inline int __phy_read(struct mii_phy* phy, int id, int reg)
52 return phy->mdio_read(phy->dev, id, reg);
55 static inline void __phy_write(struct mii_phy* phy, int id, int reg, int val)
57 phy->mdio_write(phy->dev, id, reg, val);
60 static inline int phy_read(struct mii_phy* phy, int reg)
62 return phy->mdio_read(phy->dev, phy->mii_id, reg);
65 static inline void phy_write(struct mii_phy* phy, int reg, int val)
67 phy->mdio_write(phy->dev, phy->mii_id, reg, val);
70 static int reset_one_mii_phy(struct mii_phy* phy, int phy_id)
75 val = __phy_read(phy, phy_id, MII_BMCR);
78 __phy_write(phy, phy_id, MII_BMCR, val);
83 val = __phy_read(phy, phy_id, MII_BMCR);
89 __phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE);
94 static int bcm5201_init(struct mii_phy* phy)
98 data = phy_read(phy, MII_BCM5201_MULTIPHY);
100 phy_write(phy, MII_BCM5201_MULTIPHY, data);
102 phy_write(phy, MII_BCM5201_INTERRUPT, 0);
107 static int bcm5201_suspend(struct mii_phy* phy)
109 phy_write(phy, MII_BCM5201_INTERRUPT, 0);
110 phy_write(phy, MII_BCM5201_MULTIPHY, MII_BCM5201_MULTIPHY_SUPERISOLATE);
115 static int bcm5221_init(struct mii_phy* phy)
119 data = phy_read(phy, MII_BCM5221_TEST);
120 phy_write(phy, MII_BCM5221_TEST,
123 data = phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2);
124 phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2,
127 data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
128 phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
131 data = phy_read(phy, MII_BCM5221_TEST);
132 phy_write(phy, MII_BCM5221_TEST,
138 static int bcm5221_suspend(struct mii_phy* phy)
142 data = phy_read(phy, MII_BCM5221_TEST);
143 phy_write(phy, MII_BCM5221_TEST,
146 data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
147 phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
153 static int bcm5241_init(struct mii_phy* phy)
157 data = phy_read(phy, MII_BCM5221_TEST);
158 phy_write(phy, MII_BCM5221_TEST,
161 data = phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2);
162 phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2,
165 data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
166 phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
169 data = phy_read(phy, MII_BCM5221_TEST);
170 phy_write(phy, MII_BCM5221_TEST,
176 static int bcm5241_suspend(struct mii_phy* phy)
180 data = phy_read(phy, MII_BCM5221_TEST);
181 phy_write(phy, MII_BCM5221_TEST,
184 data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
185 phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
191 static int bcm5400_init(struct mii_phy* phy)
196 data = phy_read(phy, MII_BCM5400_AUXCONTROL);
198 phy_write(phy, MII_BCM5400_AUXCONTROL, data);
200 data = phy_read(phy, MII_BCM5400_GB_CONTROL);
202 phy_write(phy, MII_BCM5400_GB_CONTROL, data);
207 (void)reset_one_mii_phy(phy, 0x1f);
209 data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY);
211 __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data);
213 data = phy_read(phy, MII_BCM5400_AUXCONTROL);
215 phy_write(phy, MII_BCM5400_AUXCONTROL, data);
220 static int bcm5400_suspend(struct mii_phy* phy)
225 static int bcm5401_init(struct mii_phy* phy)
230 rev = phy_read(phy, MII_PHYSID2) & 0x000f;
243 phy_write(phy, 0x18, 0x0c20);
244 phy_write(phy, 0x17, 0x0012);
245 phy_write(phy, 0x15, 0x1804);
246 phy_write(phy, 0x17, 0x0013);
247 phy_write(phy, 0x15, 0x1204);
248 phy_write(phy, 0x17, 0x8006);
249 phy_write(phy, 0x15, 0x0132);
250 phy_write(phy, 0x17, 0x8006);
251 phy_write(phy, 0x15, 0x0232);
252 phy_write(phy, 0x17, 0x201f);
253 phy_write(phy, 0x15, 0x0a20);
257 data = phy_read(phy, MII_BCM5400_GB_CONTROL);
259 phy_write(phy, MII_BCM5400_GB_CONTROL, data);
264 (void)reset_one_mii_phy(phy, 0x1f);
266 data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY);
268 __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data);
273 static int bcm5401_suspend(struct mii_phy* phy)
278 static int bcm5411_init(struct mii_phy* phy)
285 phy_write(phy, 0x1c, 0x8c23);
286 phy_write(phy, 0x1c, 0x8ca3);
287 phy_write(phy, 0x1c, 0x8c23);
292 phy_write(phy, MII_BMCR, BMCR_RESET);
293 phy_write(phy, MII_BMCR, 0x1340);
295 data = phy_read(phy, MII_BCM5400_GB_CONTROL);
297 phy_write(phy, MII_BCM5400_GB_CONTROL, data);
302 (void)reset_one_mii_phy(phy, 0x1f);
307 static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
311 phy->autoneg = 1;
312 phy->speed = SPEED_10;
313 phy->duplex = DUPLEX_HALF;
314 phy->pause = 0;
315 phy->advertising = advertise;
318 adv = phy_read(phy, MII_ADVERTISE);
328 phy_write(phy, MII_ADVERTISE, adv);
331 ctl = phy_read(phy, MII_BMCR);
333 phy_write(phy, MII_BMCR, ctl);
338 static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
342 phy->autoneg = 0;
343 phy->speed = speed;
344 phy->duplex = fd;
345 phy->pause = 0;
347 ctl = phy_read(phy, MII_BMCR);
351 phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
366 phy_write(phy, MII_BMCR, ctl);
371 static int genmii_poll_link(struct mii_phy *phy)
375 (void)phy_read(phy, MII_BMSR);
376 status = phy_read(phy, MII_BMSR);
379 if (phy->autoneg && !(status & BMSR_ANEGCOMPLETE))
384 static int genmii_read_link(struct mii_phy *phy)
388 if (phy->autoneg) {
389 lpa = phy_read(phy, MII_LPA);
392 phy->duplex = DUPLEX_FULL;
394 phy->duplex = DUPLEX_HALF;
396 phy->speed = SPEED_100;
398 phy->speed = SPEED_10;
399 phy->pause = 0;
408 static int generic_suspend(struct mii_phy* phy)
410 phy_write(phy, MII_BMCR, BMCR_PDOWN);
415 static int bcm5421_init(struct mii_phy* phy)
420 id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2));
426 phy_write(phy, 0x18, 0x1007);
427 data = phy_read(phy, 0x18);
428 phy_write(phy, 0x18, data | 0x0400);
429 phy_write(phy, 0x18, 0x0007);
430 data = phy_read(phy, 0x18);
431 phy_write(phy, 0x18, data | 0x0800);
432 phy_write(phy, 0x17, 0x000a);
433 data = phy_read(phy, 0x15);
434 phy_write(phy, 0x15, data | 0x0200);
439 phy_write(phy, 4, 0x01e1);
440 phy_write(phy, 9, 0x0300);
445 if (phy->platform_data) {
446 struct device_node *np = of_get_parent(phy->platform_data);
452 phy_write(phy, 0x1c, 0x9002);
453 phy_write(phy, 0x1c, 0xa821);
454 phy_write(phy, 0x1c, 0x941d);
462 static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise)
466 phy->autoneg = 1;
467 phy->speed = SPEED_10;
468 phy->duplex = DUPLEX_HALF;
469 phy->pause = 0;
470 phy->advertising = advertise;
473 adv = phy_read(phy, MII_ADVERTISE);
487 phy_write(phy, MII_ADVERTISE, adv);
490 adv = phy_read(phy, MII_1000BASETCONTROL);
496 phy_write(phy, MII_1000BASETCONTROL, adv);
499 ctl = phy_read(phy, MII_BMCR);
501 phy_write(phy, MII_BMCR, ctl);
506 static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd)
510 phy->autoneg = 0;
511 phy->speed = speed;
512 phy->duplex = fd;
513 phy->pause = 0;
515 ctl = phy_read(phy, MII_BMCR);
519 phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
535 phy_write(phy, MII_BMCR, ctl);
540 static int bcm54xx_read_link(struct mii_phy *phy)
545 if (phy->autoneg) {
546 val = phy_read(phy, MII_BCM5400_AUXSTATUS);
549 phy->duplex = phy_BCM5400_link_table[link_mode][0] ?
551 phy->speed = phy_BCM5400_link_table[link_mode][2] ?
555 val = phy_read(phy, MII_LPA);
556 phy->pause = (phy->duplex == DUPLEX_FULL) &&
566 static int marvell88e1111_init(struct mii_phy* phy)
571 rev = phy_read(phy, MII_PHYSID2) & 0x000f;
573 phy_write(phy, 0x1d, 0x000a);
574 phy_write(phy, 0x1e, 0x0821);
576 phy_write(phy, 0x1d, 0x0006);
577 phy_write(phy, 0x1e, 0x8600);
579 phy_write(phy, 0x1d, 0x000b);
580 phy_write(phy, 0x1e, 0x0100);
582 phy_write(phy, 0x1d, 0x0004);
583 phy_write(phy, 0x1e, 0x4850);
590 static int bcm5421_poll_link(struct mii_phy* phy)
596 phy_write(phy, MII_NCONFIG, 0x1000);
597 phy_reg = phy_read(phy, MII_NCONFIG);
602 return genmii_poll_link(phy);
605 phy_write(phy, MII_NCONFIG, 0x2000);
606 phy_reg = phy_read(phy, MII_NCONFIG);
614 static int bcm5421_read_link(struct mii_phy* phy)
620 phy_write(phy, MII_NCONFIG, 0x1000);
621 phy_reg = phy_read(phy, MII_NCONFIG);
626 return bcm54xx_read_link(phy);
628 phy->speed = SPEED_1000;
631 phy_write(phy, MII_NCONFIG, 0x2000);
632 phy_reg = phy_read(phy, MII_NCONFIG);
635 phy->duplex |= DUPLEX_HALF;
637 phy->duplex |= DUPLEX_FULL;
642 static int bcm5421_enable_fiber(struct mii_phy* phy, int autoneg)
645 phy_write(phy, MII_NCONFIG, 0x9020);
647 phy_write(phy, MII_NCONFIG, 0x945f);
651 phy_write(phy, MII_NCONFIG, 0xfc01);
652 phy_write(phy, 0x0b, 0x0004);
655 phy->autoneg = autoneg;
663 static int bcm5461_poll_link(struct mii_phy* phy)
669 phy_write(phy, MII_NCONFIG, 0x7c00);
670 phy_reg = phy_read(phy, MII_NCONFIG);
675 return genmii_poll_link(phy);
678 phy_write(phy, MII_NCONFIG, 0x7000);
679 phy_reg = phy_read(phy, MII_NCONFIG);
689 static int bcm5461_read_link(struct mii_phy* phy)
695 phy_write(phy, MII_NCONFIG, 0x7c00);
696 phy_reg = phy_read(phy, MII_NCONFIG);
701 return bcm54xx_read_link(phy);
704 phy->speed = SPEED_1000;
707 phy_write(phy, MII_NCONFIG, 0x7000);
708 phy_reg = phy_read(phy, MII_NCONFIG);
711 phy->duplex |= DUPLEX_FULL;
713 phy->duplex |= DUPLEX_HALF;
718 static int bcm5461_enable_fiber(struct mii_phy* phy, int autoneg)
721 phy_write(phy, MII_NCONFIG, 0xfc0b);
725 phy_write(phy, MII_ADVERTISE, 0x01e0);
726 phy_write(phy, MII_BMCR, 0x1140);
729 phy_write(phy, MII_BMCR, 0x0140);
732 phy->autoneg = autoneg;
737 static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise)
741 phy->autoneg = 1;
742 phy->speed = SPEED_10;
743 phy->duplex = DUPLEX_HALF;
744 phy->pause = 0;
745 phy->advertising = advertise;
748 adv = phy_read(phy, MII_ADVERTISE);
762 phy_write(phy, MII_ADVERTISE, adv);
764 adv = phy_read(phy, MII_M1011_PHY_SPEC_CONTROL);
772 phy_write(phy, MII_1000BASETCONTROL, adv);
775 ctl = phy_read(phy, MII_BMCR);
777 phy_write(phy, MII_BMCR, ctl);
782 static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd)
786 phy->autoneg = 0;
787 phy->speed = speed;
788 phy->duplex = fd;
789 phy->pause = 0;
791 ctl = phy_read(phy, MII_BMCR);
814 ctl2 = phy_read(phy, MII_M1011_PHY_SPEC_CONTROL);
823 phy_write(phy, MII_1000BASETCONTROL, ctl2);
826 phy_write(phy, MII_BMCR, ctl);
831 static int marvell_read_link(struct mii_phy *phy)
835 if (phy->autoneg) {
836 status = phy_read(phy, MII_M1011_PHY_SPEC_STATUS);
840 phy->speed = SPEED_1000;
842 phy->speed = SPEED_100;
844 phy->speed = SPEED_10;
846 phy->duplex = DUPLEX_FULL;
848 phy->duplex = DUPLEX_HALF;
851 phy->pause = (status & pmask) == pmask;
1145 int mii_phy_probe(struct mii_phy *phy, int mii_id)
1155 phy->mii_id = mii_id;
1158 rc = reset_one_mii_phy(phy, mii_id);
1163 id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2));
1172 phy->def = def;
1176 phy->speed = 0;
1177 phy->duplex = 0;
1178 phy->pause = 0;
1179 phy->advertising = 0;