Lines Matching refs:bp
97 static void qec_init(struct bigmac *bp)
99 void __iomem *gregs = bp->gregs;
100 struct sbus_dev *qec_sdev = bp->qec_sdev;
101 u8 bsizes = bp->bigmac_bursts;
164 static void bigmac_stop(struct bigmac *bp)
166 bigmac_tx_reset(bp->bregs);
167 bigmac_rx_reset(bp->bregs);
170 static void bigmac_get_counters(struct bigmac *bp, void __iomem *bregs)
172 struct net_device_stats *stats = &bp->enet_stats;
192 static void bigmac_clean_rings(struct bigmac *bp)
197 if (bp->rx_skbs[i] != NULL) {
198 dev_kfree_skb_any(bp->rx_skbs[i]);
199 bp->rx_skbs[i] = NULL;
204 if (bp->tx_skbs[i] != NULL) {
205 dev_kfree_skb_any(bp->tx_skbs[i]);
206 bp->tx_skbs[i] = NULL;
211 static void bigmac_init_rings(struct bigmac *bp, int from_irq)
213 struct bmac_init_block *bb = bp->bmac_block;
214 struct net_device *dev = bp->dev;
221 bp->rx_new = bp->rx_old = bp->tx_new = bp->tx_old = 0;
224 bigmac_clean_rings(bp);
234 bp->rx_skbs[i] = skb;
242 sbus_map_single(bp->bigmac_sdev, skb->data,
268 static void write_tcvr_bit(struct bigmac *bp, void __iomem *tregs, int bit)
270 if (bp->tcvr_type == internal) {
278 } else if (bp->tcvr_type == external) {
291 static int read_tcvr_bit(struct bigmac *bp, void __iomem *tregs)
295 if (bp->tcvr_type == internal) {
302 } else if (bp->tcvr_type == external) {
314 static int read_tcvr_bit2(struct bigmac *bp, void __iomem *tregs)
318 if (bp->tcvr_type == internal) {
324 } else if (bp->tcvr_type == external) {
336 static void put_tcvr_byte(struct bigmac *bp,
343 write_tcvr_bit(bp, tregs, ((byte >> shift) & 1));
348 static void bigmac_tcvr_write(struct bigmac *bp, void __iomem *tregs,
355 switch(bp->tcvr_type) {
366 write_tcvr_bit(bp, tregs, 0);
367 write_tcvr_bit(bp, tregs, 1);
368 write_tcvr_bit(bp, tregs, 0);
369 write_tcvr_bit(bp, tregs, 1);
371 put_tcvr_byte(bp, tregs,
372 ((bp->tcvr_type == internal) ?
375 put_tcvr_byte(bp, tregs, reg);
377 write_tcvr_bit(bp, tregs, 1);
378 write_tcvr_bit(bp, tregs, 0);
382 write_tcvr_bit(bp, tregs, (val >> shift) & 1);
387 static unsigned short bigmac_tcvr_read(struct bigmac *bp,
394 switch(bp->tcvr_type) {
405 write_tcvr_bit(bp, tregs, 0);
406 write_tcvr_bit(bp, tregs, 1);
407 write_tcvr_bit(bp, tregs, 1);
408 write_tcvr_bit(bp, tregs, 0);
410 put_tcvr_byte(bp, tregs,
411 ((bp->tcvr_type == internal) ?
414 put_tcvr_byte(bp, tregs, reg);
416 if (bp->tcvr_type == external) {
419 (void) read_tcvr_bit2(bp, tregs);
420 (void) read_tcvr_bit2(bp, tregs);
425 tmp = read_tcvr_bit2(bp, tregs);
430 (void) read_tcvr_bit2(bp, tregs);
431 (void) read_tcvr_bit2(bp, tregs);
432 (void) read_tcvr_bit2(bp, tregs);
436 (void) read_tcvr_bit(bp, tregs);
437 (void) read_tcvr_bit(bp, tregs);
442 tmp = read_tcvr_bit(bp, tregs);
447 (void) read_tcvr_bit(bp, tregs);
448 (void) read_tcvr_bit(bp, tregs);
449 (void) read_tcvr_bit(bp, tregs);
454 static void bigmac_tcvr_init(struct bigmac *bp)
456 void __iomem *tregs = bp->tregs;
473 bp->tcvr_type = external;
478 bp->tcvr_type = internal;
494 static int try_next_permutation(struct bigmac *bp, void __iomem *tregs)
496 if (bp->sw_bmcr & BMCR_SPEED100) {
500 bp->sw_bmcr = (BMCR_ISOLATE | BMCR_PDOWN | BMCR_LOOPBACK);
501 bigmac_tcvr_write(bp, tregs, BIGMAC_BMCR, bp->sw_bmcr);
502 bp->sw_bmcr = (BMCR_RESET);
503 bigmac_tcvr_write(bp, tregs, BIGMAC_BMCR, bp->sw_bmcr);
507 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMCR);
508 if ((bp->sw_bmcr & BMCR_RESET) == 0)
513 printk(KERN_ERR "%s: PHY reset failed.\n", bp->dev->name);
515 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMCR);
518 bp->sw_bmcr &= ~(BMCR_SPEED100);
519 bigmac_tcvr_write(bp, tregs, BIGMAC_BMCR, bp->sw_bmcr);
529 struct bigmac *bp = (struct bigmac *) data;
530 void __iomem *tregs = bp->tregs;
533 bp->timer_ticks++;
534 if (bp->timer_state == ltrywait) {
535 bp->sw_bmsr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMSR);
536 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMCR);
537 if (bp->sw_bmsr & BMSR_LSTATUS) {
539 bp->dev->name,
540 (bp->sw_bmcr & BMCR_SPEED100) ?
542 bp->timer_state = asleep;
545 if (bp->timer_ticks >= 4) {
548 ret = try_next_permutation(bp, tregs);
551 bp->dev->name);
552 ret = bigmac_init_hw(bp, 0);
555 "BigMAC.\n", bp->dev->name);
559 bp->timer_ticks = 0;
568 bp->dev->name);
570 bp->timer_ticks = 0;
571 bp->timer_state = asleep; /* foo on you */
575 bp->bigmac_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
576 add_timer(&bp->bigmac_timer);
583 static void bigmac_begin_auto_negotiation(struct bigmac *bp)
585 void __iomem *tregs = bp->tregs;
589 bp->sw_bmsr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMSR);
590 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMCR);
593 bp->sw_bmcr = (BMCR_ISOLATE | BMCR_PDOWN | BMCR_LOOPBACK);
594 bigmac_tcvr_write(bp, tregs, BIGMAC_BMCR, bp->sw_bmcr);
595 bp->sw_bmcr = (BMCR_RESET);
596 bigmac_tcvr_write(bp, tregs, BIGMAC_BMCR, bp->sw_bmcr);
600 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMCR);
601 if ((bp->sw_bmcr & BMCR_RESET) == 0)
606 printk(KERN_ERR "%s: PHY reset failed.\n", bp->dev->name);
608 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, BIGMAC_BMCR);
611 bp->sw_bmcr |= BMCR_SPEED100;
612 bigmac_tcvr_write(bp, tregs, BIGMAC_BMCR, bp->sw_bmcr);
614 bp->timer_state = ltrywait;
615 bp->timer_ticks = 0;
616 bp->bigmac_timer.expires = jiffies + (12 * HZ) / 10;
617 bp->bigmac_timer.data = (unsigned long) bp;
618 bp->bigmac_timer.function = &bigmac_timer;
619 add_timer(&bp->bigmac_timer);
622 static int bigmac_init_hw(struct bigmac *bp, int from_irq)
624 void __iomem *gregs = bp->gregs;
625 void __iomem *cregs = bp->creg;
626 void __iomem *bregs = bp->bregs;
627 unsigned char *e = &bp->dev->dev_addr[0];
630 bigmac_get_counters(bp, bregs);
636 qec_init(bp);
639 bigmac_init_rings(bp, from_irq);
642 bigmac_tcvr_init(bp);
645 bigmac_stop(bp);
675 sbus_writel(bp->bblock_dvma + bib_offset(be_rxd, 0),
677 sbus_writel(bp->bblock_dvma + bib_offset(be_txd, 0),
711 bigmac_begin_auto_negotiation(bp);
718 static void bigmac_is_medium_rare(struct bigmac *bp, u32 qec_status, u32 bmac_status)
753 bigmac_init_hw(bp, 1);
757 static void bigmac_tx(struct bigmac *bp)
759 struct be_txd *txbase = &bp->bmac_block->be_txd[0];
760 struct net_device *dev = bp->dev;
763 spin_lock(&bp->lock);
765 elem = bp->tx_old;
767 while (elem != bp->tx_new) {
776 skb = bp->tx_skbs[elem];
777 bp->enet_stats.tx_packets++;
778 bp->enet_stats.tx_bytes += skb->len;
779 sbus_unmap_single(bp->bigmac_sdev,
784 bp->tx_skbs[elem] = NULL;
790 bp->tx_old = elem;
793 TX_BUFFS_AVAIL(bp) > 0)
794 netif_wake_queue(bp->dev);
796 spin_unlock(&bp->lock);
800 static void bigmac_rx(struct bigmac *bp)
802 struct be_rxd *rxbase = &bp->bmac_block->be_rxd[0];
804 int elem = bp->rx_new, drops = 0;
814 bp->enet_stats.rx_errors++;
815 bp->enet_stats.rx_length_errors++;
819 bp->enet_stats.rx_dropped++;
824 skb = bp->rx_skbs[elem];
834 sbus_unmap_single(bp->bigmac_sdev,
838 bp->rx_skbs[elem] = new_skb;
839 new_skb->dev = bp->dev;
842 this->rx_addr = sbus_map_single(bp->bigmac_sdev,
860 sbus_dma_sync_single_for_cpu(bp->bigmac_sdev,
864 sbus_dma_sync_single_for_device(bp->bigmac_sdev,
876 skb->protocol = eth_type_trans(skb, bp->dev);
878 bp->dev->last_rx = jiffies;
879 bp->enet_stats.rx_packets++;
880 bp->enet_stats.rx_bytes += len;
885 bp->rx_new = elem;
887 printk(KERN_NOTICE "%s: Memory squeeze, deferring packet.\n", bp->dev->name);
892 struct bigmac *bp = (struct bigmac *) dev_id;
898 bmac_status = sbus_readl(bp->creg + CREG_STAT);
899 qec_status = sbus_readl(bp->gregs + GLOB_STAT);
904 bigmac_is_medium_rare(bp, qec_status, bmac_status);
907 bigmac_tx(bp);
910 bigmac_rx(bp);
917 struct bigmac *bp = (struct bigmac *) dev->priv;
920 ret = request_irq(dev->irq, &bigmac_interrupt, IRQF_SHARED, dev->name, bp);
925 init_timer(&bp->bigmac_timer);
926 ret = bigmac_init_hw(bp, 0);
928 free_irq(dev->irq, bp);
934 struct bigmac *bp = (struct bigmac *) dev->priv;
936 del_timer(&bp->bigmac_timer);
937 bp->timer_state = asleep;
938 bp->timer_ticks = 0;
940 bigmac_stop(bp);
941 bigmac_clean_rings(bp);
942 free_irq(dev->irq, bp);
948 struct bigmac *bp = (struct bigmac *) dev->priv;
950 bigmac_init_hw(bp, 0);
957 struct bigmac *bp = (struct bigmac *) dev->priv;
962 mapping = sbus_map_single(bp->bigmac_sdev, skb->data, len, SBUS_DMA_TODEVICE);
965 spin_lock_irq(&bp->lock);
966 entry = bp->tx_new;
968 bp->bmac_block->be_txd[entry].tx_flags = TXD_UPDATE;
969 bp->tx_skbs[entry] = skb;
970 bp->bmac_block->be_txd[entry].tx_addr = mapping;
971 bp->bmac_block->be_txd[entry].tx_flags =
973 bp->tx_new = NEXT_TX(entry);
974 if (TX_BUFFS_AVAIL(bp) <= 0)
976 spin_unlock_irq(&bp->lock);
979 sbus_writel(CREG_CTRL_TWAKEUP, bp->creg + CREG_CTRL);
989 struct bigmac *bp = (struct bigmac *) dev->priv;
991 bigmac_get_counters(bp, bp->bregs);
992 return &bp->enet_stats;
997 struct bigmac *bp = (struct bigmac *) dev->priv;
998 void __iomem *bregs = bp->bregs;
1054 struct bigmac *bp = dev->priv;
1059 bp->qec_sdev->slot);
1064 struct bigmac *bp = dev->priv;
1066 spin_lock_irq(&bp->lock);
1067 bp->sw_bmsr = bigmac_tcvr_read(bp, bp->tregs, BIGMAC_BMSR);
1068 spin_unlock_irq(&bp->lock);
1070 return (bp->sw_bmsr & BMSR_LSTATUS);
1082 struct bigmac *bp;
1100 bp = dev->priv;
1101 bp->qec_sdev = qec_sdev;
1102 bp->bigmac_sdev = qec_sdev->child;
1104 SET_NETDEV_DEV(dev, &bp->bigmac_sdev->ofdev.dev);
1106 spin_lock_init(&bp->lock);
1109 if ((bp->bigmac_sdev->num_registers != 3) ||
1110 (bp->qec_sdev->num_registers != 2)) {
1112 bp->qec_sdev->num_registers,
1113 bp->bigmac_sdev->num_registers);
1119 bp->gregs = sbus_ioremap(&bp->qec_sdev->resource[0], 0,
1121 if (!bp->gregs) {
1127 if ((sbus_readl(bp->gregs + GLOB_CTRL) & 0xf0000000) != GLOB_CTRL_BMODE) {
1133 if (qec_global_reset(bp->gregs))
1137 bsizes = prom_getintdefault(bp->qec_sdev->prom_node,
1141 bsizes_more = prom_getintdefault(bp->qec_sdev->bus->prom_node,
1151 bp->bigmac_bursts = bsizes;
1154 qec_init(bp);
1157 bp->creg = sbus_ioremap(&bp->bigmac_sdev->resource[0], 0,
1159 if (!bp->creg) {
1165 bp->bregs = sbus_ioremap(&bp->bigmac_sdev->resource[1], 0,
1167 if (!bp->bregs) {
1175 bp->tregs = sbus_ioremap(&bp->bigmac_sdev->resource[2], 0,
1177 if (!bp->tregs) {
1183 bigmac_stop(bp);
1186 bp->bmac_block = sbus_alloc_consistent(bp->bigmac_sdev,
1188 &bp->bblock_dvma);
1189 if (bp->bmac_block == NULL || bp->bblock_dvma == 0) {
1195 bp->board_rev = prom_getintdefault(bp->bigmac_sdev->prom_node,
1199 init_timer(&bp->bigmac_timer);
1200 bp->timer_state = asleep;
1201 bp->timer_ticks = 0;
1204 bp->dev = dev;
1220 dev->irq = bp->bigmac_sdev->irqs[0];
1228 dev_set_drvdata(&bp->bigmac_sdev->ofdev.dev, bp);
1241 if (bp->gregs)
1242 sbus_iounmap(bp->gregs, GLOB_REG_SIZE);
1243 if (bp->creg)
1244 sbus_iounmap(bp->creg, CREG_REG_SIZE);
1245 if (bp->bregs)
1246 sbus_iounmap(bp->bregs, BMAC_REG_SIZE);
1247 if (bp->tregs)
1248 sbus_iounmap(bp->tregs, TCVR_REG_SIZE);
1250 if (bp->bmac_block)
1251 sbus_free_consistent(bp->bigmac_sdev,
1253 bp->bmac_block,
1254 bp->bblock_dvma);
1277 struct bigmac *bp = dev_get_drvdata(&dev->dev);
1278 struct net_device *net_dev = bp->dev;
1282 sbus_iounmap(bp->gregs, GLOB_REG_SIZE);
1283 sbus_iounmap(bp->creg, CREG_REG_SIZE);
1284 sbus_iounmap(bp->bregs, BMAC_REG_SIZE);
1285 sbus_iounmap(bp->tregs, TCVR_REG_SIZE);
1286 sbus_free_consistent(bp->bigmac_sdev,
1288 bp->bmac_block,
1289 bp->bblock_dvma);