Lines Matching refs:smc
23 #include "h/smc.h"
46 static void build_claim_beacon(struct s_smc *smc, u_long t_request);
47 static int init_mac(struct s_smc *smc, int all);
48 static void rtm_init(struct s_smc *smc);
49 static void smt_split_up_fifo(struct s_smc *smc);
56 #define DUMMY_READ() smc->hw.mc_dummy = (u_short) inp(ADDR(B0_RAP))
61 SMT_PANIC(smc,SMT_E0130, SMT_E0130_MSG) ; \
68 SMT_PANIC(smc,SMT_E0131, SMT_E0131_MSG) ; \
83 #define MA smc->hw.fddi_canon_addr
85 #define MA smc->hw.fddi_home_addr
110 static u_long mac_get_tneg(struct s_smc *smc)
119 void mac_update_counter(struct s_smc *smc)
121 smc->mib.m[MAC0].fddiMACFrame_Ct =
122 (smc->mib.m[MAC0].fddiMACFrame_Ct & 0xffff0000L)
124 smc->mib.m[MAC0].fddiMACLost_Ct =
125 (smc->mib.m[MAC0].fddiMACLost_Ct & 0xffff0000L)
127 smc->mib.m[MAC0].fddiMACError_Ct =
128 (smc->mib.m[MAC0].fddiMACError_Ct & 0xffff0000L)
130 smc->mib.m[MAC0].fddiMACT_Neg = mac_get_tneg(smc) ;
137 smt_emulate_token_ct( smc, MAC0 );
144 static void write_mdr(struct s_smc *smc, u_long val)
154 static void init_ram(struct s_smc *smc)
158 smc->hw.fp.fifo.rbc_ram_start = 0 ;
159 smc->hw.fp.fifo.rbc_ram_end =
160 smc->hw.fp.fifo.rbc_ram_start + RBC_MEM_SIZE ;
162 MARW(smc->hw.fp.fifo.rbc_ram_start) ;
163 for (i = smc->hw.fp.fifo.rbc_ram_start;
164 i < (u_short) (smc->hw.fp.fifo.rbc_ram_end-1); i++)
165 write_mdr(smc,0L) ;
167 write_mdr(smc,0L) ;
173 static void set_recvptr(struct s_smc *smc)
178 outpw(FM_A(FM_RPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* RPR1 */
179 outpw(FM_A(FM_SWPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* SWPR1 */
180 outpw(FM_A(FM_WPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* WPR1 */
181 outpw(FM_A(FM_EARV1),smc->hw.fp.fifo.tx_s_start-1) ; /* EARV1 */
186 if (smc->hw.fp.fifo.rx2_fifo_size) {
187 outpw(FM_A(FM_RPR2),smc->hw.fp.fifo.rx2_fifo_start) ;
188 outpw(FM_A(FM_SWPR2),smc->hw.fp.fifo.rx2_fifo_start) ;
189 outpw(FM_A(FM_WPR2),smc->hw.fp.fifo.rx2_fifo_start) ;
190 outpw(FM_A(FM_EARV2),smc->hw.fp.fifo.rbc_ram_end-1) ;
193 outpw(FM_A(FM_RPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;
194 outpw(FM_A(FM_SWPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;
195 outpw(FM_A(FM_WPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;
196 outpw(FM_A(FM_EARV2),smc->hw.fp.fifo.rbc_ram_end-1) ;
203 static void set_txptr(struct s_smc *smc)
210 outpw(FM_A(FM_RPXA0),smc->hw.fp.fifo.tx_a0_start) ; /* RPXA0 */
211 outpw(FM_A(FM_SWPXA0),smc->hw.fp.fifo.tx_a0_start) ; /* SWPXA0 */
212 outpw(FM_A(FM_WPXA0),smc->hw.fp.fifo.tx_a0_start) ; /* WPXA0 */
213 outpw(FM_A(FM_EAA0),smc->hw.fp.fifo.rx2_fifo_start-1) ; /* EAA0 */
218 if (smc->hw.fp.fifo.tx_s_size) {
219 outpw(FM_A(FM_RPXS),smc->hw.fp.fifo.tx_s_start) ;
220 outpw(FM_A(FM_SWPXS),smc->hw.fp.fifo.tx_s_start) ;
221 outpw(FM_A(FM_WPXS),smc->hw.fp.fifo.tx_s_start) ;
222 outpw(FM_A(FM_EAS),smc->hw.fp.fifo.tx_a0_start-1) ;
225 outpw(FM_A(FM_RPXS),smc->hw.fp.fifo.tx_a0_start-1) ;
226 outpw(FM_A(FM_SWPXS),smc->hw.fp.fifo.tx_a0_start-1) ;
227 outpw(FM_A(FM_WPXS),smc->hw.fp.fifo.tx_a0_start-1) ;
228 outpw(FM_A(FM_EAS),smc->hw.fp.fifo.tx_a0_start-1) ;
235 static void init_rbc(struct s_smc *smc)
242 rbc_ram_addr = smc->hw.fp.fifo.rx2_fifo_start - 1 ;
249 set_recvptr(smc) ;
250 set_txptr(smc) ;
256 static void init_rx(struct s_smc *smc)
263 smc->hw.fp.rx[QUEUE_R1] = queue = &smc->hw.fp.rx_q[QUEUE_R1] ;
270 smc->hw.fp.rx[QUEUE_R2] = queue = &smc->hw.fp.rx_q[QUEUE_R2] ;
278 void set_formac_tsync(struct s_smc *smc, long sync_bw)
286 static void init_tx(struct s_smc *smc)
293 smc->hw.fp.tx[QUEUE_S] = queue = &smc->hw.fp.tx_q[QUEUE_S] ;
298 set_formac_tsync(smc,smc->ess.sync_bw) ;
304 smc->hw.fp.tx[QUEUE_A0] = queue = &smc->hw.fp.tx_q[QUEUE_A0] ;
309 llc_recover_tx(smc) ;
312 static void mac_counter_init(struct s_smc *smc)
326 ec = (u_long *)&smc->hw.fp.err_stats ;
329 smc->mib.m[MAC0].fddiMACRingOp_Ct = 0 ;
335 static void set_formac_addr(struct s_smc *smc)
337 long t_requ = smc->mib.m[MAC0].fddiMACT_Req ;
340 outpw(FM_A(FM_LAIL),(unsigned)((smc->hw.fddi_home_addr.a[4]<<8) +
341 smc->hw.fddi_home_addr.a[5])) ;
342 outpw(FM_A(FM_LAIC),(unsigned)((smc->hw.fddi_home_addr.a[2]<<8) +
343 smc->hw.fddi_home_addr.a[3])) ;
344 outpw(FM_A(FM_LAIM),(unsigned)((smc->hw.fddi_home_addr.a[0]<<8) +
345 smc->hw.fddi_home_addr.a[1])) ;
349 outpw(FM_A(FM_LAGL),(unsigned)((smc->hw.fp.group_addr.a[4]<<8) +
350 smc->hw.fp.group_addr.a[5])) ;
351 outpw(FM_A(FM_LAGC),(unsigned)((smc->hw.fp.group_addr.a[2]<<8) +
352 smc->hw.fp.group_addr.a[3])) ;
353 outpw(FM_A(FM_LAGM),(unsigned)((smc->hw.fp.group_addr.a[0]<<8) +
354 smc->hw.fp.group_addr.a[1])) ;
377 static void copy_tx_mac(struct s_smc *smc, u_long td, struct fddi_mac *mac,
396 write_mdr(smc,MDR_REVERSE(*p)) ;
401 write_mdr(smc,td) ; /* write over memory data reg to buffer */
426 static void directed_beacon(struct s_smc *smc)
437 memcpy((char *)a+1,(char *) &smc->mib.m[MAC0].fddiMACUpstreamNbr,6) ;
441 MARW(smc->hw.fp.fifo.rbc_ram_start+DBEACON_FRAME_OFF+4) ;
442 write_mdr(smc,MDR_REVERSE(a[0])) ;
444 write_mdr(smc,MDR_REVERSE(a[1])) ;
446 outpw(FM_A(FM_SABC),smc->hw.fp.fifo.rbc_ram_start + DBEACON_FRAME_OFF) ;
455 static void build_claim_beacon(struct s_smc *smc, u_long t_request)
466 mac = &smc->hw.fp.mac_sfb ;
473 copy_tx_mac(smc,td,(struct fddi_mac *)mac,
474 smc->hw.fp.fifo.rbc_ram_start + CLAIM_FRAME_OFF,len) ;
476 outpw(FM_A(FM_SACL),smc->hw.fp.fifo.rbc_ram_start + CLAIM_FRAME_OFF) ;
488 copy_tx_mac(smc,td,(struct fddi_mac *)mac,
489 smc->hw.fp.fifo.rbc_ram_start + BEACON_FRAME_OFF,len) ;
491 outpw(FM_A(FM_SABC),smc->hw.fp.fifo.rbc_ram_start + BEACON_FRAME_OFF) ;
506 copy_tx_mac(smc,td,(struct fddi_mac *)mac,
507 smc->hw.fp.fifo.rbc_ram_start + DBEACON_FRAME_OFF,len) ;
510 outpw(FM_A(FM_EACB),smc->hw.fp.fifo.rx1_fifo_start-1) ;
516 static void formac_rcv_restart(struct s_smc *smc)
519 SETMASK(FM_A(FM_MDREG1),smc->hw.fp.rx_mode,FM_ADDRX) ;
524 void formac_tx_restart(struct s_smc *smc)
530 static void enable_formac(struct s_smc *smc)
542 static void disable_formac(struct s_smc *smc)
554 static void mac_ring_up(struct s_smc *smc, int up)
557 formac_rcv_restart(smc) ; /* enable receive function */
558 smc->hw.mac_ring_is_up = TRUE ;
559 llc_restart_tx(smc) ; /* TX queue */
568 smc->hw.mac_ring_is_up = FALSE ;
581 void mac2_irq(struct s_smc *smc, u_short code_s2u, u_short code_s2l)
590 queue_event(smc,EVENT_RMT,RM_TX_STATE_CHANGE) ;
593 queue_event(smc,EVENT_RMT,RM_TX_STATE_CHANGE) ;
599 change_s2l = smc->hw.fp.s2l ^ code_s2l ;
600 change_s2u = smc->hw.fp.s2u ^ code_s2u ;
603 (!smc->hw.mac_ring_is_up && ((code_s2l & FM_SRNGOP)))) {
605 mac_ring_up(smc,1) ;
606 queue_event(smc,EVENT_RMT,RM_RING_OP) ;
607 smc->mib.m[MAC0].fddiMACRingOp_Ct++ ;
610 mac_ring_up(smc,0) ;
611 queue_event(smc,EVENT_RMT,RM_RING_NON_OP) ;
616 smc->mib.m[MAC0].fddiMACNotCopied_Ct++ ;
620 smc->hw.mac_ct.mac_r_restart_counter++ ;
621 /* formac_rcv_restart(smc) ; */
622 smt_stat_counter(smc,1) ;
626 queue_event(smc,EVENT_RMT,RM_OTHER_BEACON) ;
628 queue_event(smc,EVENT_RMT,RM_MY_BEACON) ;
637 queue_event(smc,EVENT_RMT,RM_MY_CLAIM) ;
647 queue_event(smc,EVENT_RMT,RM_VALID_CLAIM) ;
654 queue_event(smc,EVENT_RMT,RM_TRT_EXP) ;
661 smc->r.dup_addr_test = DA_FAILED ;
662 queue_event(smc,EVENT_RMT,RM_DUP_ADDR) ;
665 smc->hw.fp.err_stats.err_bec_stat++ ;
667 smc->hw.fp.err_stats.err_clm_stat++ ;
669 smc->mib.m[MAC0].fddiMACTvxExpired_Ct++ ;
671 if (!(change_s2l & FM_SRNGOP) && (smc->hw.fp.s2l & FM_SRNGOP)) {
672 mac_ring_up(smc,0) ;
673 queue_event(smc,EVENT_RMT,RM_RING_NON_OP) ;
675 mac_ring_up(smc,1) ;
676 queue_event(smc,EVENT_RMT,RM_RING_OP) ;
677 smc->mib.m[MAC0].fddiMACRingOp_Ct++ ;
681 smc->hw.fp.err_stats.err_phinv++ ;
683 smc->hw.fp.err_stats.err_sifg_det++ ;
685 smc->hw.fp.err_stats.err_tkiss++ ;
687 smc->hw.fp.err_stats.err_tkerr++ ;
689 smc->mib.m[MAC0].fddiMACFrame_Ct += 0x10000L ;
691 smc->mib.m[MAC0].fddiMACError_Ct += 0x10000L ;
693 smc->mib.m[MAC0].fddiMACLost_Ct += 0x10000L ;
695 SMT_PANIC(smc,SMT_E0114, SMT_E0114_MSG) ;
699 smc->hw.fp.s2l = code_s2l ;
700 smc->hw.fp.s2u = code_s2u ;
707 void mac3_irq(struct s_smc *smc, u_short code_s3u, u_short code_s3l)
713 smc->hw.mac_ct.mac_r_restart_counter++ ;
714 smt_stat_counter(smc,1);
719 SMT_PANIC(smc,SMT_E0115, SMT_E0115_MSG) ;
722 SMT_PANIC(smc,SMT_E0116, SMT_E0116_MSG) ;
730 static void formac_offline(struct s_smc *smc)
740 disable_formac(smc) ;
741 smc->hw.mac_ring_is_up = FALSE ;
742 smc->hw.hw_state = STOPPED ;
748 static void formac_online(struct s_smc *smc)
750 enable_formac(smc) ;
752 smc->hw.fp.rx_mode, FM_MMODE | FM_SELRA | FM_ADDRX) ;
758 int init_fplus(struct s_smc *smc)
760 smc->hw.fp.nsa_mode = FM_MRNNSAFNMA ;
761 smc->hw.fp.rx_mode = FM_MDAMA ;
762 smc->hw.fp.group_addr = fddi_broadcast ;
763 smc->hw.fp.func_addr = 0 ;
764 smc->hw.fp.frselreg_init = 0 ;
766 init_driver_fplus(smc) ;
767 if (smc->s.sas == SMT_DAS)
768 smc->hw.fp.mdr3init |= FM_MENDAS ;
770 smc->hw.mac_ct.mac_nobuf_counter = 0 ;
771 smc->hw.mac_ct.mac_r_restart_counter = 0 ;
773 smc->hw.fp.fm_st1u = (HW_PTR) ADDR(B0_ST1U) ;
774 smc->hw.fp.fm_st1l = (HW_PTR) ADDR(B0_ST1L) ;
775 smc->hw.fp.fm_st2u = (HW_PTR) ADDR(B0_ST2U) ;
776 smc->hw.fp.fm_st2l = (HW_PTR) ADDR(B0_ST2L) ;
777 smc->hw.fp.fm_st3u = (HW_PTR) ADDR(B0_ST3U) ;
778 smc->hw.fp.fm_st3l = (HW_PTR) ADDR(B0_ST3L) ;
780 smc->hw.fp.s2l = smc->hw.fp.s2u = 0 ;
781 smc->hw.mac_ring_is_up = 0 ;
783 mac_counter_init(smc) ;
786 smc->hw.mac_pa.t_neg = (u_long)0 ;
787 smc->hw.mac_pa.t_pri = (u_long)0 ;
790 mac_do_pci_fix(smc) ;
792 return(init_mac(smc,1)) ;
793 /* enable_formac(smc) ; */
796 static int init_mac(struct s_smc *smc, int all)
805 set_formac_addr(smc) ;
808 outpw(FM_A(FM_MDREG2),smc->hw.fp.mdr2init) ;
811 init_ram(smc) ;
818 time = hwt_quick_read(smc) ;
824 smt_split_up_fifo(smc) ;
826 init_tx(smc) ;
827 init_rx(smc) ;
828 init_rbc(smc) ;
830 build_claim_beacon(smc,smc->mib.m[MAC0].fddiMACT_Req) ;
837 outpw(FM_A(FM_MDREG1),MDR1INIT | FM_SELRA | smc->hw.fp.rx_mode) ;
838 outpw(FM_A(FM_MDREG2),smc->hw.fp.mdr2init) ;
839 outpw(FM_A(FM_MDREG3),smc->hw.fp.mdr3init) ;
840 outpw(FM_A(FM_FRSELREG),smc->hw.fp.frselreg_init) ;
848 t_max = (u_short)(smc->mib.m[MAC0].fddiMACT_Max/32) ;
856 if (smc->mib.m[MAC0].fddiMACTvxValue < (u_long) (- US2BCLK(52))) {
860 (u_short)((smc->mib.m[MAC0].fddiMACTvxValue/255) & MB)) ;
870 rtm_init(smc) ; /* RT-Monitor */
876 hwt_wait_time(smc,time,MS2BCLK(10)) ;
884 if (!smc->hw.hw_is_64bit) {
889 smc->hw.hw_state = STOPPED ;
890 mac_drv_repair_descr(smc) ;
892 smc->hw.hw_state = STARTED ;
901 void config_mux(struct s_smc *smc, int mux)
903 plc_config_mux(smc,mux) ;
915 void sm_mac_check_beacon_claim(struct s_smc *smc)
920 formac_rcv_restart(smc) ;
921 process_receive(smc) ;
928 void sm_ma_control(struct s_smc *smc, int mode)
933 formac_offline(smc) ;
936 (void)init_mac(smc,0) ;
939 formac_online(smc) ;
942 directed_beacon(smc) ;
952 int sm_mac_get_tx_state(struct s_smc *smc)
961 static struct s_fpmc* mac_get_mc_table(struct s_smc *smc,
981 for (i = 0, tb = smc->hw.fp.mc.table ; i < FPMAX_MULTICAST ; i++, tb++){
997 void mac_clear_multicast(smc)
998 struct s_smc *smc ;
1005 void mac_clear_multicast(struct s_smc *smc)
1010 smc->hw.fp.os_slots_used = 0 ; /* note the SMT addresses */
1012 for (i = 0, tb = smc->hw.fp.mc.table ; i < FPMAX_MULTICAST ; i++, tb++){
1022 int mac_add_multicast(smc,addr,can)
1023 struct s_smc *smc ;
1047 int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can)
1056 if (smc->hw.fp.smt_slots_used >= SMT_MAX_MULTI) {
1061 if (smc->hw.fp.os_slots_used >= FPMAX_MULTICAST-SMT_MAX_MULTI) {
1069 if (!(tb = mac_get_mc_table(smc,addr,&own,0,can & ~0x80)))
1076 smc->hw.fp.smt_slots_used++ ;
1078 smc->hw.fp.os_slots_used++ ;
1093 void mac_update_multicast(smc)
1094 struct s_smc *smc ;
1101 void mac_update_multicast(struct s_smc *smc)
1115 if (smc->hw.fp.func_addr) {
1116 fu = (u_char *) &smc->hw.fp.func_addr ;
1135 for (i = 0, tb = smc->hw.fp.mc.table; i < FPMAX_MULTICAST; i++, tb++) {
1156 void mac_set_rx_mode(smc,mode)
1157 struct s_smc *smc ;
1177 void mac_set_rx_mode(struct s_smc *smc, int mode)
1181 smc->hw.fp.rx_prom |= RX_MODE_ALL_MULTI ;
1184 smc->hw.fp.rx_prom &= ~RX_MODE_ALL_MULTI ;
1187 smc->hw.fp.rx_prom |= RX_MODE_PROM ;
1190 smc->hw.fp.rx_prom &= ~RX_MODE_PROM ;
1193 smc->hw.fp.nsa_mode = FM_MDAMA ;
1194 smc->hw.fp.rx_mode = (smc->hw.fp.rx_mode & ~FM_ADDET) |
1195 smc->hw.fp.nsa_mode ;
1198 smc->hw.fp.nsa_mode = FM_MRNNSAFNMA ;
1199 smc->hw.fp.rx_mode = (smc->hw.fp.rx_mode & ~FM_ADDET) |
1200 smc->hw.fp.nsa_mode ;
1203 if (smc->hw.fp.rx_prom & RX_MODE_PROM) {
1204 smc->hw.fp.rx_mode = FM_MLIMPROM ;
1206 else if (smc->hw.fp.rx_prom & RX_MODE_ALL_MULTI) {
1207 smc->hw.fp.rx_mode = smc->hw.fp.nsa_mode | FM_EXGPA0 ;
1210 smc->hw.fp.rx_mode = smc->hw.fp.nsa_mode ;
1211 SETMASK(FM_A(FM_MDREG1),smc->hw.fp.rx_mode,FM_ADDRX) ;
1212 mac_update_multicast(smc) ;
1233 void rtm_irq(struct s_smc *smc)
1239 AIX_EVENT(smc, (u_long) FDDI_RING_STATUS,
1241 (u_long) FDDI_RTT, smt_get_event_word(smc));
1246 static void rtm_init(struct s_smc *smc)
1252 void rtm_set_timer(struct s_smc *smc)
1258 (int) smc->mib.a[PATH0].fddiPATHT_Rmode,0) ;
1259 outpd(ADDR(B2_RTM_INI),smc->mib.a[PATH0].fddiPATHT_Rmode) ;
1262 static void smt_split_up_fifo(struct s_smc *smc)
1291 SMT_PANIC(smc,SMT_E0117, SMT_E0117_MSG) ;
1296 smc->hw.fp.fifo.rx1_fifo_size = RX_FIFO_SPACE ;
1297 smc->hw.fp.fifo.rx2_fifo_size = 0 ;
1302 smc->hw.fp.fifo.rx1_fifo_size = RX_LARGE_FIFO ;
1303 smc->hw.fp.fifo.rx2_fifo_size = RX_SMALL_FIFO ;
1306 smc->hw.fp.fifo.rx1_fifo_size = RX_FIFO_SPACE *
1308 smc->hw.fp.fifo.rx2_fifo_size = RX_FIFO_SPACE *
1335 if (smc->mib.a[PATH0].fddiPATHSbaPayload) {
1337 smc->hw.fp.fifo.fifo_config_mode |=
1338 smc->mib.fddiESSSynchTxMode | SYNC_TRAFFIC_ON ;
1342 smc->hw.fp.fifo.fifo_config_mode &=
1349 if (smc->hw.fp.fifo.fifo_config_mode & SYNC_TRAFFIC_ON) {
1350 if (smc->hw.fp.fifo.fifo_config_mode & SEND_ASYNC_AS_SYNC) {
1351 smc->hw.fp.fifo.tx_s_size = TX_LARGE_FIFO ;
1352 smc->hw.fp.fifo.tx_a0_size = TX_SMALL_FIFO ;
1355 smc->hw.fp.fifo.tx_s_size = TX_MEDIUM_FIFO ;
1356 smc->hw.fp.fifo.tx_a0_size = TX_MEDIUM_FIFO ;
1360 smc->hw.fp.fifo.tx_s_size = 0 ;
1361 smc->hw.fp.fifo.tx_a0_size = TX_FIFO_SPACE ;
1364 smc->hw.fp.fifo.rx1_fifo_start = smc->hw.fp.fifo.rbc_ram_start +
1366 smc->hw.fp.fifo.tx_s_start = smc->hw.fp.fifo.rx1_fifo_start +
1367 smc->hw.fp.fifo.rx1_fifo_size ;
1368 smc->hw.fp.fifo.tx_a0_start = smc->hw.fp.fifo.tx_s_start +
1369 smc->hw.fp.fifo.tx_s_size ;
1370 smc->hw.fp.fifo.rx2_fifo_start = smc->hw.fp.fifo.tx_a0_start +
1371 smc->hw.fp.fifo.tx_a0_size ;
1373 DB_SMT("FIFO split: mode = %x\n",smc->hw.fp.fifo.fifo_config_mode,0) ;
1375 smc->hw.fp.fifo.rbc_ram_start, smc->hw.fp.fifo.rbc_ram_end) ;
1377 smc->hw.fp.fifo.rx1_fifo_start, smc->hw.fp.fifo.tx_s_start) ;
1379 smc->hw.fp.fifo.tx_a0_start, smc->hw.fp.fifo.rx2_fifo_start) ;
1382 void formac_reinit_tx(struct s_smc *smc)
1389 if (!smc->hw.fp.fifo.tx_s_size && smc->mib.a[PATH0].fddiPATHSbaPayload){
1390 (void)init_mac(smc,0) ;