Lines Matching defs:Port
89 int Port, /* Port Index (MAC_1 + n) */
96 pPrt = &pAC->GIni.GP[Port];
99 XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
102 XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
106 XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
111 XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
128 int Port, /* Port Index (MAC_1 + n) */
135 pPrt = &pAC->GIni.GP[Port];
139 XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
145 XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
148 XM_OUT16(IoC, Port, XM_PHY_DATA, Val);
152 XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
173 int Port, /* Port Index (MAC_1 + n) */
188 pPrt = &pAC->GIni.GP[Port];
194 GM_OUT16(IoC, Port, GM_SMI_CTRL, *pVal);
196 GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
211 GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
217 GM_IN16(IoC, Port, GM_SMI_DATA, pVal);
240 int Port, /* Port Index (MAC_1 + n) */
256 pPrt = &pAC->GIni.GP[Port];
259 GM_OUT16(IoC, Port, GM_SMI_DATA, Val);
264 GM_OUT16(IoC, Port, GM_SMI_CTRL, Val);
266 GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
283 GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
311 int Port, /* Port Index (MAC_1 + n) */
315 void (*r_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 *pVal);
324 r_func(pAC, IoC, Port, PhyReg, pVal);
340 int Port, /* Port Index (MAC_1 + n) */
344 void (*w_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 Val);
353 w_func(pAC, IoC, Port, PhyReg, Val);
372 int Port, /* Port Index (MAC_1 + n) */
385 XM_IN32(IoC, Port, XM_MODE, &MdReg);
394 XM_OUT32(IoC, Port, XM_MODE, MdReg);
401 GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
411 GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg);
432 int Port, /* Port Index (MAC_1 + n) */
445 XM_IN32(IoC, Port, XM_MODE, &MdReg);
454 XM_OUT32(IoC, Port, XM_MODE, MdReg);
461 GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
471 GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg);
504 int Port, /* Port Index (MAC_1 + n) */
511 XM_IN16(IoC, Port, XM_RX_CMD, &OldRxCmd);
562 XM_OUT16(IoC, Port, XM_RX_CMD, RxCmd);
589 int Port, /* Port Index (MAC_1 + n) */
598 GM_IN16(IoC, Port, GM_RX_CTRL, &OldRxCmd);
610 GM_OUT16(IoC, Port, GM_RX_CTRL, RxCmd);
616 GM_IN16(IoC, Port, GM_SERIAL_MODE, &OldRxCmd);
628 GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd);
646 int Port, /* Port Index (MAC_1 + n) */
651 SkXmSetRxCmd(pAC, IoC, Port, Mode);
655 SkGmSetRxCmd(pAC, IoC, Port, Mode);
673 int Port, /* Port Index (MAC_1 + n) */
680 XM_IN16(IoC, Port, XM_TX_CMD, &Word);
689 XM_OUT16(IoC, Port, XM_TX_CMD, Word);
693 GM_IN16(IoC, Port, GM_TX_CTRL, &Word);
702 GM_OUT16(IoC, Port, GM_TX_CTRL, Word);
716 * All Exact Match Address registers of the XMAC 'Port' will be
726 int Port, /* Port Index (MAC_1 + n) */
741 XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]);
752 * Flush the transmit FIFO of the MAC specified by the index 'Port'
760 int Port) /* Port Index (MAC_1 + n) */
767 XM_IN32(IoC, Port, XM_MODE, &MdReg);
769 XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FTF);
788 * Flush the receive FIFO of the MAC specified by the index 'Port'
796 int Port) /* Port Index (MAC_1 + n) */
803 XM_IN32(IoC, Port, XM_MODE, &MdReg);
805 XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FRF);
858 int Port) /* Port Index (MAC_1 + n) */
863 XM_OUT32(IoC, Port, XM_GP_PORT, XM_GP_RES_STAT);
866 XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
868 XM_OUT32(IoC, Port, XM_MODE, 0); /* clear Mode Reg */
870 XM_OUT16(IoC, Port, XM_TX_CMD, 0); /* reset TX CMD Reg */
871 XM_OUT16(IoC, Port, XM_RX_CMD, 0); /* reset RX CMD Reg */
874 switch (pAC->GIni.GP[Port].PhyType) {
876 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);
880 SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);
884 SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */
890 XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr);
893 SkXmClrExactAddr(pAC, IoC, Port, 0, 15);
896 XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr);
906 * The XMAC of the specified 'Port' and all connected devices
921 int Port) /* Port Index (MAC_1 + n) */
930 SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
942 SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_SET_MAC_RST);
944 SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &Word);
950 if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
954 if (Port == 0) {
983 int Port) /* Port Index (MAC_1 + n) */
988 SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
990 if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
994 if (Port == 0) {
1004 XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD);
1025 int Port) /* Port Index (MAC_1 + n) */
1036 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
1039 GM_OUTHASH(IoC, Port, GM_MC_ADDR_H1, EmptyHash);
1042 GM_IN16(IoC, Port, GM_RX_CTRL, &RxCtrl);
1044 GM_OUT16(IoC, Port, GM_RX_CTRL,
1062 int Port) /* Port Index (MAC_1 + n) */
1079 SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
1082 SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
1099 int Port) /* Port Index (MAC_1 + n) */
1105 SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR);
1108 SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
1131 SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
1134 SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
1141 SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
1146 SK_IN32(IoC, MR_ADDR(Port, GPHY_CTRL), &DWord);
1167 int Port) /* Port Index (MAC_1 + n) */
1171 pPrt = &pAC->GIni.GP[Port];
1174 SkMacRxTxDisable(pAC, IoC, Port);
1179 SkXmSoftRst(pAC, IoC, Port);
1186 SkGmSoftRst(pAC, IoC, Port);
1191 SkMacFlushTxFifo(pAC, IoC, Port);
1193 SkMacFlushRxFifo(pAC, IoC, Port);
1212 int Port) /* Port Index (MAC_1 + n) */
1218 SkXmHardRst(pAC, IoC, Port);
1225 SkGmHardRst(pAC, IoC, Port);
1229 pAC->GIni.GP[Port].PState = SK_PRT_RESET;
1252 int Port) /* Port Index (MAC_1 + n) */
1258 pPrt = &pAC->GIni.GP[Port];
1261 /* Port State: SK_PRT_STOP */
1263 SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
1275 SkXmClearRst(pAC, IoC, Port);
1279 SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_ID1, &pPrt->PhyId1);
1285 XM_IN16(IoC, Port, XM_MMU_CMD, &SWord);
1287 XM_OUT16(IoC, Port, XM_MMU_CMD, SWord | XM_MMU_NO_PRE);
1292 SkXmPhyWrite(pAC, IoC, Port, BcomRegC0Hack[i].PhyReg,
1300 SkXmPhyWrite(pAC, IoC, Port, BcomRegA1Hack[i].PhyReg,
1306 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
1308 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
1315 XM_IN16(IoC, Port, XM_ISRC, &SWord);
1322 SkMacInitPhy(pAC, IoC, Port, SK_FALSE);
1327 XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_COM4SIG);
1341 SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
1343 XM_OUT16(IoC, Port, (XM_SA + i * 2), SWord);
1354 XM_OUT16(IoC, Port, XM_RX_HI_WM, SK_XM_RX_HI_WM);
1375 XM_OUT16(IoC, Port, XM_TX_THR, SWord);
1378 XM_OUT16(IoC, Port, XM_TX_CMD, XM_TX_AUTO_PAD);
1396 XM_OUT16(IoC, Port, XM_RX_CMD, SWord);
1405 XM_OUT32(IoC, Port, XM_MODE, XM_DEF_MODE);
1412 XM_OUT32(IoC, Port, XM_RX_EV_MSK, XMR_DEF_MSK);
1419 XM_OUT32(IoC, Port, XM_TX_EV_MSK, XMT_DEF_MSK);
1454 int Port) /* Port Index (MAC_1 + n) */
1461 pPrt = &pAC->GIni.GP[Port];
1464 /* Port State: SK_PRT_STOP */
1466 SK_IN32(IoC, MR_ADDR(Port, GMAC_CTRL), &DWord);
1478 SkGmHardRst(pAC, IoC, Port);
1480 SkGmClearRst(pAC, IoC, Port);
1487 GM_IN16(IoC, Port, GM_GP_CTRL, &SWord);
1493 GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
1524 SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_OFF);
1539 GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
1546 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_ID1, &pPrt->PhyId1);
1548 SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
1552 (void)SkGmResetCounter(pAC, IoC, Port);
1555 GM_OUT16(IoC, Port, GM_TX_CTRL, TX_COL_THR(pPrt->PMacColThres));
1558 GM_OUT16(IoC, Port, GM_RX_CTRL, GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA |
1562 GM_OUT16(IoC, Port, GM_TX_FLOW_CTRL, 0xffff);
1566 GM_IN16(IoC, Port, GM_TX_PARAM, &SWord);
1573 GM_OUT16(IoC, Port, GM_TX_PARAM, SWord);
1577 GM_IN16(IoC, Port, GM_SERIAL_MODE, &SWord);
1592 GM_OUT16(IoC, Port, GM_SERIAL_MODE, SWord);
1608 SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
1617 GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + (2 - i) * 4), SWord);
1620 GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
1623 GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
1627 SK_IN16(IoC, (B2_MAC_1 + Port * 8 + i * 2), &SWord);
1629 GM_OUT16(IoC, Port, (GM_SRC_ADDR_2L + i * 4), SWord);
1632 GM_OUT16(IoC, Port, GM_MC_ADDR_H1 + 4*i, 0);
1636 GM_OUT16(IoC, Port, GM_MC_ADDR_H4, 0);
1639 GM_OUT16(IoC, Port, GM_TX_IRQ_MSK, 0);
1640 GM_OUT16(IoC, Port, GM_RX_IRQ_MSK, 0);
1641 GM_OUT16(IoC, Port, GM_TR_IRQ_MSK, 0);
1645 GM_IN16(IoC, Port, GM_GP_STAT, &SWord);
1675 int Port) /* Port Index (MAC_1 + n) */
1677 switch (pAC->GIni.GP[Port].PLinkModeStatus) {
1723 int Port) /* Port Index (MAC_1 + n) */
1729 pPrt = &pAC->GIni.GP[Port];
1731 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
1748 XM_OUT16(IoC, Port, XM_MMU_CMD, Word);
1750 XM_IN32(IoC, Port, XM_MODE, &DWord);
1768 XM_OUT16(IoC, Port, XM_MAC_PTIME, 0xffff);
1774 SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_PAUSE);
1785 SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_DIS_PAUSE);
1788 XM_OUT32(IoC, Port, XM_MODE, DWord);
1806 int Port, /* Port Index (MAC_1 + n) */
1812 pPrt = &pAC->GIni.GP[Port];
1818 ("InitPhyXmac: no auto-negotiation Port %d\n", Port));
1831 ("InitPhyXmac: with auto-negotiation Port %d\n", Port));
1870 SkXmPhyWrite(pAC, IoC, Port, PHY_XMAC_AUNE_ADV, Ctrl);
1882 SkXmPhyWrite(pAC, IoC, Port, PHY_XMAC_CTRL, Ctrl);
1900 int Port, /* Port Index (MAC_1 + n) */
1916 pPrt = &pAC->GIni.GP[Port];
1929 ("InitPhyBcom: no auto-negotiation Port %d\n", Port));
1947 ("InitPhyBcom: with auto-negotiation Port %d\n", Port));
1996 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, Ctrl2);
2001 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, Ctrl3);
2017 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, Ctrl5);
2021 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, Ctrl4);
2024 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL, Ctrl1);
2045 int Port, /* Port Index (MAC_1 + n) */
2061 pPrt = &pAC->GIni.GP[Port];
2072 ("InitPhyMarv: Port %d, auto-negotiation %s\n",
2073 Port, AutoNeg ? "ON" : "OFF"));
2076 VCPUprintf(0, "SkGmInitPhyMarv(), Port=%u, DoLoop=%u\n",
2077 Port, DoLoop);
2081 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
2086 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
2094 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL, ExtPhyCtrl);
2100 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
2109 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
2272 SkGmPhyWrite(pAC, IoC, Port, 30, 0x0700 /* 0x0708 */);
2279 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
2284 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV, AutoNegAdv);
2295 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PHY_M_PC_FL_GOOD);
2301 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL,
2309 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
2315 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
2333 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_CTRL, LedCtrl);
2339 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_OVER,
2353 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
2358 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_CTRL, &C1000BaseT);
2363 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &AutoNegAdv);
2368 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
2373 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
2376 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat1);
2381 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
2417 int Port, /* Port Index (MAC_1 + n) */
2429 pPrt = &pAC->GIni.GP[Port];
2446 ("InitPhyLone: no auto-negotiation Port %d\n", Port));
2464 ("InitPhyLone: with auto-negotiation Port %d\n", Port));
2507 SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_1000T_CTRL, Ctrl2);
2512 SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_AUNE_ADV, Ctrl3);
2522 SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_CTRL, Ctrl1);
2542 int Port, /* Port Index (MAC_1 + n) */
2564 int Port, /* Port Index (MAC_1 + n) */
2569 pPrt = &pAC->GIni.GP[Port];
2576 SkXmInitPhyXmac(pAC, IoC, Port, DoLoop);
2579 SkXmInitPhyBcom(pAC, IoC, Port, DoLoop);
2583 SkXmInitPhyLone(pAC, IoC, Port, DoLoop);
2586 SkXmInitPhyNat(pAC, IoC, Port, DoLoop);
2596 SkGmInitPhyMarv(pAC, IoC, Port, DoLoop);
2619 int Port) /* Port Index (MAC_1 + n) */
2626 ("AutoNegDoneXmac, Port %d\n", Port));
2628 pPrt = &pAC->GIni.GP[Port];
2631 SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_LP, &LPAb);
2632 SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_RES_ABI, &ResAb);
2638 ("AutoNegFail: Remote fault bit set Port %d\n", Port));
2653 ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
2702 int Port) /* Port Index (MAC_1 + n) */
2714 ("AutoNegDoneBcom, Port %d\n", Port));
2715 pPrt = &pAC->GIni.GP[Port];
2718 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &LPAb);
2721 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
2724 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &AuxStat);
2729 ("AutoNegFail: Remote fault bit set Port %d\n", Port));
2744 ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
2754 ("Master/Slave Fault Port %d\n", Port));
2805 int Port) /* Port Index (MAC_1 + n) */
2813 ("AutoNegDoneMarv, Port %d\n", Port));
2814 pPrt = &pAC->GIni.GP[Port];
2817 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_LP, &LPAb);
2823 ("AutoNegFail: Remote fault bit set Port %d\n", Port));
2828 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
2833 ("Master/Slave Fault Port %d\n", Port));
2843 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &AuxStat);
2848 ("AutoNegFail: Speed & Duplex not resolved, Port %d\n", Port));
2913 int Port) /* Port Index (MAC_1 + n) */
2921 ("AutoNegDoneLone, Port %d\n", Port));
2922 pPrt = &pAC->GIni.GP[Port];
2925 SkXmPhyRead(pAC, IoC, Port, PHY_LONE_AUNE_LP, &LPAb);
2926 SkXmPhyRead(pAC, IoC, Port, PHY_LONE_1000T_STAT, &ResAb);
2927 SkXmPhyRead(pAC, IoC, Port, PHY_LONE_Q_STAT, &QuickStat);
2933 ("AutoNegFail: Remote fault bit set Port %d\n", Port));
2950 ("Master/Slave Fault Port %d\n", Port));
3019 int Port) /* Port Index (MAC_1 + n) */
3041 int Port) /* Port Index (MAC_1 + n) */
3048 pPrt = &pAC->GIni.GP[Port];
3056 Rtv = SkXmAutoNegDoneXmac(pAC, IoC, Port);
3059 Rtv = SkXmAutoNegDoneBcom(pAC, IoC, Port);
3063 Rtv = SkXmAutoNegDoneLone(pAC, IoC, Port);
3066 Rtv = SkXmAutoNegDoneNat(pAC, IoC, Port);
3078 Rtv = SkGmAutoNegDoneMarv(pAC, IoC, Port);
3087 ("AutoNeg done Port %d\n", Port));
3092 SkMacRxTxEnable(pAC, IoC, Port);
3111 int Port) /* Port Index (MAC_1 + n) */
3120 pPrt = &pAC->GIni.GP[Port];
3138 SkXmInitDupMd(pAC, IoC, Port);
3140 SkXmInitPauseMd(pAC, IoC, Port);
3162 XM_OUT16(IoC, Port, XM_IMSK, IntMask);
3165 XM_IN16(IoC, Port, XM_MMU_CMD, &Reg);
3176 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
3177 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
3179 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK,
3184 SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, PHY_L_DEF_MSK);
3188 SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, PHY_N_DEF_MSK); */
3195 XM_OUT16(IoC, Port, XM_MMU_CMD, Reg | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
3217 GM_IN16(IoC, Port, GM_GP_CTRL, &Reg);
3226 GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Reg | GM_GPCR_RX_ENA |
3231 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK,
3253 int Port) /* Port Index (MAC_1 + n) */
3260 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
3262 XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
3265 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
3272 GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
3274 GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Word & ~(GM_GPCR_RX_ENA |
3278 GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
3296 int Port) /* Port Index (MAC_1 + n) */
3303 pPrt = &pAC->GIni.GP[Port];
3309 XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
3318 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Word);
3319 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
3321 SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);
3326 SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);
3330 SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */
3344 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
3365 int Port, /* Port Index (MAC_1 + n) */
3370 XM_IN32(IoC, Port, XM_MODE, &MdReg);
3379 XM_OUT32(IoC, Port, XM_MODE, MdReg);
3396 int Port, /* Port Index (MAC_1 + n) */
3404 XM_IN32(IoC, Port, XM_MODE, &MdReg);
3413 XM_OUT32(IoC, Port, XM_MODE, MdReg);
3442 int Port, /* Port Index (MAC_1 + n) */
3447 pPrt = &pAC->GIni.GP[Port];
3453 ("AutoNegLipa: AutoNeg detected on Port %d, IStatus=0x%04X\n",
3454 Port, IStatus));
3472 int Port, /* Port Index (MAC_1 + n) */
3477 pPrt = &pAC->GIni.GP[Port];
3483 ("AutoNegLipa: AutoNeg detected on Port %d, PhyStat=0x%04X\n",
3484 Port, PhyStat));
3513 int Port) /* Port Index (MAC_1 + n) */
3523 pPrt = &pAC->GIni.GP[Port];
3525 XM_IN16(IoC, Port, XM_ISRC, &IStatus);
3529 SkXmAutoNegLipaXmac(pAC, IoC, Port, IStatus);
3539 ("XmacIrq Port %d Isr 0x%04X\n", Port, IStatus));
3544 ("SkXmIrq: spurious interrupt on Port %d\n", Port));
3550 XM_IN16(IoC, Port, XM_ISRC, &IStatus2);
3553 ("SkXmIrq: Link async. Double check Port %d 0x%04X 0x%04X\n",
3554 Port, IStatus, IStatus2));
3572 SkHWLinkDown(pAC, IoC, Port);
3575 Para.Para32[0] = (SK_U32)Port;
3592 ("SkXmIrq: AND on link that is up Port %d\n", Port));
3602 SkXmOverflowStatus(pAC, IoC, Port, IStatus, &OverflowStatus);
3604 Para.Para32[0] = (SK_U32)Port;
3648 int Port) /* Port Index (MAC_1 + n) */
3658 pPrt = &pAC->GIni.GP[Port];
3664 SkMacAutoNegLipaPhy(pAC, IoC, Port, IStatus);
3668 ("GmacIrq Port %d Isr 0x%04X\n", Port, IStatus));
3674 SkGmOverflowStatus(pAC, IoC, Port, IStatus, &OverflowStatus);
3676 Para.Para32[0] = (SK_U32)Port;
3684 SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_CLI_RX_FO);
3692 SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_CLI_TX_FU);
3720 int Port) /* Port Index (MAC_1 + n) */
3725 SkXmIrq(pAC, IoC, Port);
3732 SkGmIrq(pAC, IoC, Port);
3757 unsigned int Port) /* Port Index (MAC_1 + n) */
3763 pPrt = &pAC->GIni.GP[Port];
3767 XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_SNP_TXC | XM_SC_SNP_RXC);
3777 XM_IN16(IoC, Port, XM_STAT_CMD, &StatReg);
3807 unsigned int Port, /* Port Index (MAC_1 + n) */
3818 XM_IN32(IoC, Port, StatAddr, pVal);
3838 unsigned int Port) /* Port Index (MAC_1 + n) */
3840 XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
3842 XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
3870 unsigned int Port, /* Port Index (MAC_1 + n) */
3881 XM_IN32(IoC, Port, XM_RX_CNT_EV, &RegVal);
3887 XM_IN32(IoC, Port, XM_TX_CNT_EV, &RegVal);
3913 unsigned int Port) /* Port Index (MAC_1 + n) */
3935 unsigned int Port, /* Port Index (MAC_1 + n) */
3949 GM_IN32(IoC, Port, StatAddr, pVal);
3969 unsigned int Port) /* Port Index (MAC_1 + n) */
3975 GM_IN16(IoC, Port, GM_PHY_ADDR, &Reg);
3978 GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg | GM_PAR_MIB_CLR);
3983 GM_IN16(IoC, Port, GM_MIB_CNT_BASE + 8*i, &Word);
3987 GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg);
4015 unsigned int Port, /* Port Index (MAC_1 + n) */
4026 GM_IN16(IoC, Port, GM_RX_IRQ_SRC, &RegVal);
4032 GM_IN16(IoC, Port, GM_TX_IRQ_SRC, &RegVal);
4037 GM_IN16(IoC, Port, GM_TR_IRQ_SRC, &RegVal);
4068 int Port, /* Port Index (MAC_1 + n) */
4075 pPrt = &pAC->GIni.GP[Port];
4085 SkGmPhyWrite(pAC, IoC, Port, 29, 0x001e);
4087 SkGmPhyWrite(pAC, IoC, Port, 30, 0xcc00);
4088 SkGmPhyWrite(pAC, IoC, Port, 30, 0xc800);
4089 SkGmPhyWrite(pAC, IoC, Port, 30, 0xc400);
4090 SkGmPhyWrite(pAC, IoC, Port, 30, 0xc000);
4091 SkGmPhyWrite(pAC, IoC, Port, 30, 0xc100);
4095 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0);
4098 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
4101 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CABLE_DIAG,
4108 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
4121 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, (SK_U16)i);
4124 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);