Lines Matching refs:nic
185 (void)((NETIF_MSG_##nlevel & nic->msg_enable) && \
186 printk(KERN_##klevel PFX "%s: %s: " fmt, nic->netdev->name, \
525 struct nic {
593 static inline void e100_write_flush(struct nic *nic)
597 (void)ioread8(&nic->csr->scb.status);
600 static void e100_enable_irq(struct nic *nic)
604 spin_lock_irqsave(&nic->cmd_lock, flags);
605 iowrite8(irq_mask_none, &nic->csr->scb.cmd_hi);
606 e100_write_flush(nic);
607 spin_unlock_irqrestore(&nic->cmd_lock, flags);
610 static void e100_disable_irq(struct nic *nic)
614 spin_lock_irqsave(&nic->cmd_lock, flags);
615 iowrite8(irq_mask_all, &nic->csr->scb.cmd_hi);
616 e100_write_flush(nic);
617 spin_unlock_irqrestore(&nic->cmd_lock, flags);
620 static void e100_hw_reset(struct nic *nic)
624 iowrite32(selective_reset, &nic->csr->port);
625 e100_write_flush(nic); udelay(20);
628 iowrite32(software_reset, &nic->csr->port);
629 e100_write_flush(nic); udelay(20);
632 e100_disable_irq(nic);
635 static int e100_self_test(struct nic *nic)
637 u32 dma_addr = nic->dma_addr + offsetof(struct mem, selftest);
642 nic->mem->selftest.signature = 0;
643 nic->mem->selftest.result = 0xFFFFFFFF;
645 iowrite32(selftest | dma_addr, &nic->csr->port);
646 e100_write_flush(nic);
651 e100_disable_irq(nic);
654 if(nic->mem->selftest.result != 0) {
656 nic->mem->selftest.result);
659 if(nic->mem->selftest.signature == 0) {
667 static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, u16 data)
683 iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
684 e100_write_flush(nic); udelay(4);
689 iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
690 e100_write_flush(nic); udelay(4);
692 iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
693 e100_write_flush(nic); udelay(4);
699 iowrite8(0, &nic->csr->eeprom_ctrl_lo);
700 e100_write_flush(nic); udelay(4);
705 static u16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
715 iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
716 e100_write_flush(nic); udelay(4);
721 iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
722 e100_write_flush(nic); udelay(4);
724 iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
725 e100_write_flush(nic); udelay(4);
729 ctrl = ioread8(&nic->csr->eeprom_ctrl_lo);
739 iowrite8(0, &nic->csr->eeprom_ctrl_lo);
740 e100_write_flush(nic); udelay(4);
746 static int e100_eeprom_load(struct nic *nic)
751 e100_eeprom_read(nic, &addr_len, 0);
752 nic->eeprom_wc = 1 << addr_len;
754 for(addr = 0; addr < nic->eeprom_wc; addr++) {
755 nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr);
756 if(addr < nic->eeprom_wc - 1)
757 checksum += cpu_to_le16(nic->eeprom[addr]);
763 if(checksum != nic->eeprom[nic->eeprom_wc - 1]) {
773 static int e100_eeprom_save(struct nic *nic, u16 start, u16 count)
778 e100_eeprom_read(nic, &addr_len, 0);
779 nic->eeprom_wc = 1 << addr_len;
781 if(start + count >= nic->eeprom_wc)
785 e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]);
789 for(addr = 0; addr < nic->eeprom_wc - 1; addr++)
790 checksum += cpu_to_le16(nic->eeprom[addr]);
791 nic->eeprom[nic->eeprom_wc - 1] = le16_to_cpu(0xBABA - checksum);
792 e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1,
793 nic->eeprom[nic->eeprom_wc - 1]);
800 static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr)
806 spin_lock_irqsave(&nic->cmd_lock, flags);
810 if(likely(!ioread8(&nic->csr->scb.cmd_lo)))
822 iowrite32(dma_addr, &nic->csr->scb.gen_ptr);
823 iowrite8(cmd, &nic->csr->scb.cmd_lo);
826 spin_unlock_irqrestore(&nic->cmd_lock, flags);
831 static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
832 void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
838 spin_lock_irqsave(&nic->cb_lock, flags);
840 if(unlikely(!nic->cbs_avail)) {
845 cb = nic->cb_to_use;
846 nic->cb_to_use = cb->next;
847 nic->cbs_avail--;
850 if(unlikely(!nic->cbs_avail))
853 cb_prepare(nic, cb, skb);
861 while(nic->cb_to_send != nic->cb_to_use) {
862 if(unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
863 nic->cb_to_send->dma_addr))) {
871 schedule_work(&nic->tx_timeout_task);
875 nic->cuc_cmd = cuc_resume;
876 nic->cb_to_send = nic->cb_to_send->next;
881 spin_unlock_irqrestore(&nic->cb_lock, flags);
886 static u16 mdio_ctrl(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data)
899 spin_lock_irqsave(&nic->mdio_lock, flags);
901 if (ioread32(&nic->csr->mdi_ctrl) & mdi_ready)
907 nic->netdev->name );
908 spin_unlock_irqrestore(&nic->mdio_lock, flags);
911 iowrite32((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl);
915 if ((data_out = ioread32(&nic->csr->mdi_ctrl)) & mdi_ready)
918 spin_unlock_irqrestore(&nic->mdio_lock, flags);
935 static void e100_get_defaults(struct nic *nic)
940 pci_read_config_byte(nic->pdev, PCI_REVISION_ID, &nic->rev_id);
942 nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->rev_id;
943 if(nic->mac == mac_unknown)
944 nic->mac = mac_82557_D100_A;
946 nic->params.rfds = rfds;
947 nic->params.cbs = cbs;
950 nic->tx_threshold = 0xE0;
953 nic->tx_command = cpu_to_le16(cb_tx | cb_tx_sf |
954 ((nic->mac >= mac_82558_D101_A4) ? cb_cid : cb_i));
957 nic->blank_rfd.command = cpu_to_le16(cb_el);
958 nic->blank_rfd.rbd = 0xFFFFFFFF;
959 nic->blank_rfd.size = cpu_to_le16(VLAN_ETH_FRAME_LEN);
962 nic->mii.phy_id_mask = 0x1F;
963 nic->mii.reg_num_mask = 0x1F;
964 nic->mii.dev = nic->netdev;
965 nic->mii.mdio_read = mdio_read;
966 nic->mii.mdio_write = mdio_write;
969 static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1003 config->adaptive_ifs = nic->adaptive_ifs;
1004 config->loopback = nic->loopback;
1006 if(nic->mii.force_media && nic->mii.full_duplex)
1009 if(nic->flags & promiscuous || nic->loopback) {
1015 if(nic->flags & multicast_all)
1019 if(netif_running(nic->netdev) || !(nic->flags & wol_magic))
1022 if(nic->mac >= mac_82558_D101_A4) {
1027 if(nic->mac >= mac_82559_D101M)
1179 static void e100_setup_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1273 if (nic->flags & ich)
1280 if (nic->mac != opts->mac)
1301 static inline int e100_exec_cb_wait(struct nic *nic, struct sk_buff *skb,
1302 void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
1305 struct cb *cb = nic->cb_to_clean;
1307 if ((err = e100_exec_cb(nic, NULL, e100_setup_ucode)))
1311 nic->cuc_cmd = cuc_start;
1314 e100_write_flush(nic);
1324 iowrite8(~0, &nic->csr->scb.stat_ack);
1335 static void e100_setup_iaaddr(struct nic *nic, struct cb *cb,
1339 memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN);
1342 static void e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1345 cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr +
1354 static int e100_phy_init(struct nic *nic)
1356 struct net_device *netdev = nic->netdev;
1362 nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
1363 bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
1364 stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
1365 stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
1369 DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id);
1375 if(addr != nic->mii.phy_id) {
1385 id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1);
1386 id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2);
1387 nic->phy = (u32)id_hi << 16 | (u32)id_lo;
1388 DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy);
1392 if((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
1394 cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG);
1397 mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
1400 if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
1401 (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) &&
1402 !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))) {
1404 mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG,
1405 nic->mii.force_media ? 0 : NCONFIG_AUTO_SWITCH);
1411 static int e100_hw_init(struct nic *nic)
1415 e100_hw_reset(nic);
1418 if(!in_interrupt() && (err = e100_self_test(nic)))
1421 if((err = e100_phy_init(nic)))
1423 if((err = e100_exec_cmd(nic, cuc_load_base, 0)))
1425 if((err = e100_exec_cmd(nic, ruc_load_base, 0)))
1427 if ((err = e100_exec_cb_wait(nic, NULL, e100_setup_ucode)))
1429 if((err = e100_exec_cb(nic, NULL, e100_configure)))
1431 if((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
1433 if((err = e100_exec_cmd(nic, cuc_dump_addr,
1434 nic->dma_addr + offsetof(struct mem, stats))))
1436 if((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
1439 e100_disable_irq(nic);
1444 static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1446 struct net_device *netdev = nic->netdev;
1459 struct nic *nic = netdev_priv(netdev);
1465 nic->flags |= promiscuous;
1467 nic->flags &= ~promiscuous;
1471 nic->flags |= multicast_all;
1473 nic->flags &= ~multicast_all;
1475 e100_exec_cb(nic, NULL, e100_configure);
1476 e100_exec_cb(nic, NULL, e100_multi);
1479 static void e100_update_stats(struct nic *nic)
1481 struct net_device_stats *ns = &nic->net_stats;
1482 struct stats *s = &nic->mem->stats;
1483 u32 *complete = (nic->mac < mac_82558_D101_A4) ? &s->fc_xmt_pause :
1484 (nic->mac < mac_82559_D101M) ? (u32 *)&s->xmt_tco_frames :
1493 nic->tx_frames = le32_to_cpu(s->tx_good_frames);
1494 nic->tx_collisions = le32_to_cpu(s->tx_total_collisions);
1499 ns->collisions += nic->tx_collisions;
1503 nic->rx_over_length_errors;
1513 nic->tx_deferred += le32_to_cpu(s->tx_deferred);
1514 nic->tx_single_collisions +=
1516 nic->tx_multiple_collisions +=
1518 if(nic->mac >= mac_82558_D101_A4) {
1519 nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause);
1520 nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause);
1521 nic->rx_fc_unsupported +=
1523 if(nic->mac >= mac_82559_D101M) {
1524 nic->tx_tco_frames +=
1526 nic->rx_tco_frames +=
1533 if(e100_exec_cmd(nic, cuc_dump_reset, 0))
1537 static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)
1543 u32 prev = nic->adaptive_ifs;
1546 if((nic->tx_frames / 32 < nic->tx_collisions) &&
1547 (nic->tx_frames > min_frames)) {
1548 if(nic->adaptive_ifs < 60)
1549 nic->adaptive_ifs += 5;
1550 } else if (nic->tx_frames < min_frames) {
1551 if(nic->adaptive_ifs >= 5)
1552 nic->adaptive_ifs -= 5;
1554 if(nic->adaptive_ifs != prev)
1555 e100_exec_cb(nic, NULL, e100_configure);
1561 struct nic *nic = (struct nic *)data;
1568 mii_ethtool_gset(&nic->mii, &cmd);
1570 if(mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
1574 } else if(!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
1578 mii_check_link(&nic->mii);
1585 spin_lock_irq(&nic->cmd_lock);
1586 iowrite8(ioread8(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi);
1587 e100_write_flush(nic);
1588 spin_unlock_irq(&nic->cmd_lock);
1590 e100_update_stats(nic);
1591 e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex);
1593 if(nic->mac <= mac_82557_D100_C)
1594 e100_set_multicast_list(nic->netdev);
1596 if(nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF)
1597 nic->flags |= ich_10h_workaround;
1599 nic->flags &= ~ich_10h_workaround;
1601 mod_timer(&nic->watchdog, jiffies + E100_WATCHDOG_PERIOD);
1604 static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
1607 cb->command = nic->tx_command;
1609 if((nic->cbs_avail & ~15) == nic->cbs_avail)
1613 cb->u.tcb.threshold = nic->tx_threshold;
1615 cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev,
1623 struct nic *nic = netdev_priv(netdev);
1626 if(nic->flags & ich_10h_workaround) {
1627 if(e100_exec_cmd(nic, cuc_nop, 0))
1632 err = e100_exec_cb(nic, skb, e100_xmit_prepare);
1651 static int e100_tx_clean(struct nic *nic)
1656 spin_lock(&nic->cb_lock);
1659 for(cb = nic->cb_to_clean;
1661 cb = nic->cb_to_clean = cb->next) {
1663 (int)(((void*)cb - (void*)nic->cbs)/sizeof(struct cb)),
1667 nic->net_stats.tx_packets++;
1668 nic->net_stats.tx_bytes += cb->skb->len;
1670 pci_unmap_single(nic->pdev,
1679 nic->cbs_avail++;
1682 spin_unlock(&nic->cb_lock);
1685 if(unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
1686 netif_wake_queue(nic->netdev);
1691 static void e100_clean_cbs(struct nic *nic)
1693 if(nic->cbs) {
1694 while(nic->cbs_avail != nic->params.cbs.count) {
1695 struct cb *cb = nic->cb_to_clean;
1697 pci_unmap_single(nic->pdev,
1703 nic->cb_to_clean = nic->cb_to_clean->next;
1704 nic->cbs_avail++;
1706 pci_free_consistent(nic->pdev,
1707 sizeof(struct cb) * nic->params.cbs.count,
1708 nic->cbs, nic->cbs_dma_addr);
1709 nic->cbs = NULL;
1710 nic->cbs_avail = 0;
1712 nic->cuc_cmd = cuc_start;
1713 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean =
1714 nic->cbs;
1717 static int e100_alloc_cbs(struct nic *nic)
1720 unsigned int i, count = nic->params.cbs.count;
1722 nic->cuc_cmd = cuc_start;
1723 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL;
1724 nic->cbs_avail = 0;
1726 nic->cbs = pci_alloc_consistent(nic->pdev,
1727 sizeof(struct cb) * count, &nic->cbs_dma_addr);
1728 if(!nic->cbs)
1731 for(cb = nic->cbs, i = 0; i < count; cb++, i++) {
1732 cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
1733 cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1;
1735 cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
1736 cb->link = cpu_to_le32(nic->cbs_dma_addr +
1741 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
1742 nic->cbs_avail = count;
1747 static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
1749 if(!nic->rxs) return;
1750 if(RU_SUSPENDED != nic->ru_running) return;
1753 if(!rx) rx = nic->rxs;
1757 e100_exec_cmd(nic, ruc_start, rx->dma_addr);
1758 nic->ru_running = RU_RUNNING;
1763 static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
1765 if(!(rx->skb = netdev_alloc_skb(nic->netdev, RFD_BUF_LEN + NET_IP_ALIGN)))
1770 skb_copy_to_linear_data(rx->skb, &nic->blank_rfd, sizeof(struct rfd));
1771 rx->dma_addr = pci_map_single(nic->pdev, rx->skb->data,
1789 pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr,
1796 static int e100_rx_indicate(struct nic *nic, struct rx *rx,
1807 pci_dma_sync_single_for_cpu(nic->pdev, rx->dma_addr,
1823 pci_unmap_single(nic->pdev, rx->dma_addr,
1828 nic->ru_running = RU_SUSPENDED;
1833 skb->protocol = eth_type_trans(skb, nic->netdev);
1840 nic->rx_over_length_errors++;
1843 nic->net_stats.rx_packets++;
1844 nic->net_stats.rx_bytes += actual_size;
1845 nic->netdev->last_rx = jiffies;
1856 static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
1867 if(RU_SUSPENDED == nic->ru_running)
1871 for(rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
1872 int err = e100_rx_indicate(nic, rx, work_done, work_to_do);
1884 rx_to_start = nic->rx_to_clean;
1887 for(rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
1888 if(unlikely(e100_rx_alloc_skb(nic, rx)))
1894 writeb(stat_ack_rnr, &nic->csr->scb.stat_ack);
1895 e100_start_receiver(nic, rx_to_start);
1901 static void e100_rx_clean_list(struct nic *nic)
1904 unsigned int i, count = nic->params.rfds.count;
1906 nic->ru_running = RU_UNINITIALIZED;
1908 if(nic->rxs) {
1909 for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
1911 pci_unmap_single(nic->pdev, rx->dma_addr,
1916 kfree(nic->rxs);
1917 nic->rxs = NULL;
1920 nic->rx_to_use = nic->rx_to_clean = NULL;
1923 static int e100_rx_alloc_list(struct nic *nic)
1926 unsigned int i, count = nic->params.rfds.count;
1928 nic->rx_to_use = nic->rx_to_clean = NULL;
1929 nic->ru_running = RU_UNINITIALIZED;
1931 if(!(nic->rxs = kcalloc(count, sizeof(struct rx), GFP_ATOMIC)))
1934 for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
1935 rx->next = (i + 1 < count) ? rx + 1 : nic->rxs;
1936 rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1;
1937 if(e100_rx_alloc_skb(nic, rx)) {
1938 e100_rx_clean_list(nic);
1943 nic->rx_to_use = nic->rx_to_clean = nic->rxs;
1944 nic->ru_running = RU_SUSPENDED;
1952 struct nic *nic = netdev_priv(netdev);
1953 u8 stat_ack = ioread8(&nic->csr->scb.stat_ack);
1962 iowrite8(stat_ack, &nic->csr->scb.stat_ack);
1966 nic->ru_running = RU_SUSPENDED;
1969 e100_disable_irq(nic);
1978 struct nic *nic = netdev_priv(netdev);
1983 e100_rx_clean(nic, &work_done, work_to_do);
1984 tx_cleaned = e100_tx_clean(nic);
1989 e100_enable_irq(nic);
2002 struct nic *nic = netdev_priv(netdev);
2004 e100_disable_irq(nic);
2005 e100_intr(nic->pdev->irq, netdev);
2006 e100_tx_clean(nic);
2007 e100_enable_irq(nic);
2013 struct nic *nic = netdev_priv(netdev);
2014 return &nic->net_stats;
2019 struct nic *nic = netdev_priv(netdev);
2026 e100_exec_cb(nic, NULL, e100_setup_iaaddr);
2039 static int e100_asf(struct nic *nic)
2042 return((nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) &&
2043 (nic->eeprom[eeprom_config_asf] & eeprom_asf) &&
2044 !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) &&
2045 ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE));
2048 static int e100_up(struct nic *nic)
2052 if((err = e100_rx_alloc_list(nic)))
2054 if((err = e100_alloc_cbs(nic)))
2056 if((err = e100_hw_init(nic)))
2058 e100_set_multicast_list(nic->netdev);
2059 e100_start_receiver(nic, NULL);
2060 mod_timer(&nic->watchdog, jiffies);
2061 if((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
2062 nic->netdev->name, nic->netdev)))
2064 netif_wake_queue(nic->netdev);
2065 netif_poll_enable(nic->netdev);
2068 e100_enable_irq(nic);
2072 del_timer_sync(&nic->watchdog);
2074 e100_clean_cbs(nic);
2076 e100_rx_clean_list(nic);
2080 static void e100_down(struct nic *nic)
2083 netif_poll_disable(nic->netdev);
2084 netif_stop_queue(nic->netdev);
2085 e100_hw_reset(nic);
2086 free_irq(nic->pdev->irq, nic->netdev);
2087 del_timer_sync(&nic->watchdog);
2088 netif_carrier_off(nic->netdev);
2089 e100_clean_cbs(nic);
2090 e100_rx_clean_list(nic);
2095 struct nic *nic = netdev_priv(netdev);
2099 schedule_work(&nic->tx_timeout_task);
2104 struct nic *nic = container_of(work, struct nic, tx_timeout_task);
2105 struct net_device *netdev = nic->netdev;
2108 ioread8(&nic->csr->scb.status));
2113 static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
2123 if((err = e100_rx_alloc_list(nic)))
2125 if((err = e100_alloc_cbs(nic)))
2129 if(nic->flags & ich && loopback_mode == lb_phy)
2132 nic->loopback = loopback_mode;
2133 if((err = e100_hw_init(nic)))
2137 mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR,
2140 e100_start_receiver(nic, NULL);
2142 if(!(skb = netdev_alloc_skb(nic->netdev, ETH_DATA_LEN))) {
2148 e100_xmit_frame(skb, nic->netdev);
2152 pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr,
2155 if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
2160 mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0);
2161 nic->loopback = lb_none;
2162 e100_clean_cbs(nic);
2163 e100_hw_reset(nic);
2165 e100_rx_clean_list(nic);
2172 struct nic *nic = (struct nic *)data;
2180 nic->leds = (nic->leds & led_on) ? led_off :
2181 (nic->mac < mac_82559_D101M) ? led_on_557 : led_on_559;
2182 mdio_write(nic->netdev, nic->mii.phy_id, MII_LED_CONTROL, nic->leds);
2183 mod_timer(&nic->blink_timer, jiffies + HZ / 4);
2188 struct nic *nic = netdev_priv(netdev);
2189 return mii_ethtool_gset(&nic->mii, cmd);
2194 struct nic *nic = netdev_priv(netdev);
2197 mdio_write(netdev, nic->mii.phy_id, MII_BMCR, BMCR_RESET);
2198 err = mii_ethtool_sset(&nic->mii, cmd);
2199 e100_exec_cb(nic, NULL, e100_configure);
2207 struct nic *nic = netdev_priv(netdev);
2211 strcpy(info->bus_info, pci_name(nic->pdev));
2216 struct nic *nic = netdev_priv(netdev);
2219 sizeof(nic->mem->dump_buf) / sizeof(u32)
2226 struct nic *nic = netdev_priv(netdev);
2230 regs->version = (1 << 24) | nic->rev_id;
2231 buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 |
2232 ioread8(&nic->csr->scb.cmd_lo) << 16 |
2233 ioread16(&nic->csr->scb.status);
2236 mdio_read(netdev, nic->mii.phy_id, i);
2237 memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf));
2238 e100_exec_cb(nic, NULL, e100_dump);
2240 memcpy(&buff[2 + E100_PHY_REGS], nic->mem->dump_buf,
2241 sizeof(nic->mem->dump_buf));
2246 struct nic *nic = netdev_priv(netdev);
2247 wol->supported = (nic->mac >= mac_82558_D101_A4) ? WAKE_MAGIC : 0;
2248 wol->wolopts = (nic->flags & wol_magic) ? WAKE_MAGIC : 0;
2253 struct nic *nic = netdev_priv(netdev);
2259 nic->flags |= wol_magic;
2261 nic->flags &= ~wol_magic;
2263 e100_exec_cb(nic, NULL, e100_configure);
2270 struct nic *nic = netdev_priv(netdev);
2271 return nic->msg_enable;
2276 struct nic *nic = netdev_priv(netdev);
2277 nic->msg_enable = value;
2282 struct nic *nic = netdev_priv(netdev);
2283 return mii_nway_restart(&nic->mii);
2288 struct nic *nic = netdev_priv(netdev);
2289 return mii_link_ok(&nic->mii);
2294 struct nic *nic = netdev_priv(netdev);
2295 return nic->eeprom_wc << 1;
2302 struct nic *nic = netdev_priv(netdev);
2305 memcpy(bytes, &((u8 *)nic->eeprom)[eeprom->offset], eeprom->len);
2313 struct nic *nic = netdev_priv(netdev);
2318 memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len);
2320 return e100_eeprom_save(nic, eeprom->offset >> 1,
2327 struct nic *nic = netdev_priv(netdev);
2328 struct param_range *rfds = &nic->params.rfds;
2329 struct param_range *cbs = &nic->params.cbs;
2344 struct nic *nic = netdev_priv(netdev);
2345 struct param_range *rfds = &nic->params.rfds;
2346 struct param_range *cbs = &nic->params.cbs;
2352 e100_down(nic);
2360 e100_up(nic);
2383 struct nic *nic = netdev_priv(netdev);
2387 data[0] = !mii_link_ok(&nic->mii);
2388 data[1] = e100_eeprom_load(nic);
2392 err = mii_ethtool_gset(&nic->mii, &cmd);
2395 e100_down(nic);
2396 data[2] = e100_self_test(nic);
2397 data[3] = e100_loopback_test(nic, lb_mac);
2398 data[4] = e100_loopback_test(nic, lb_phy);
2401 err = mii_ethtool_sset(&nic->mii, &cmd);
2404 e100_up(nic);
2414 struct nic *nic = netdev_priv(netdev);
2418 mod_timer(&nic->blink_timer, jiffies);
2420 del_timer_sync(&nic->blink_timer);
2421 mdio_write(netdev, nic->mii.phy_id, MII_LED_CONTROL, 0);
2449 struct nic *nic = netdev_priv(netdev);
2453 data[i] = ((unsigned long *)&nic->net_stats)[i];
2455 data[i++] = nic->tx_deferred;
2456 data[i++] = nic->tx_single_collisions;
2457 data[i++] = nic->tx_multiple_collisions;
2458 data[i++] = nic->tx_fc_pause;
2459 data[i++] = nic->rx_fc_pause;
2460 data[i++] = nic->rx_fc_unsupported;
2461 data[i++] = nic->tx_tco_frames;
2462 data[i++] = nic->rx_tco_frames;
2505 struct nic *nic = netdev_priv(netdev);
2507 return generic_mii_ioctl(&nic->mii, if_mii(ifr), cmd, NULL);
2510 static int e100_alloc(struct nic *nic)
2512 nic->mem = pci_alloc_consistent(nic->pdev, sizeof(struct mem),
2513 &nic->dma_addr);
2514 return nic->mem ? 0 : -ENOMEM;
2517 static void e100_free(struct nic *nic)
2519 if(nic->mem) {
2520 pci_free_consistent(nic->pdev, sizeof(struct mem),
2521 nic->mem, nic->dma_addr);
2522 nic->mem = NULL;
2528 struct nic *nic = netdev_priv(netdev);
2532 if((err = e100_up(nic)))
2547 struct nic *nic;
2550 if(!(netdev = alloc_etherdev(sizeof(struct nic)))) {
2574 nic = netdev_priv(netdev);
2575 nic->netdev = netdev;
2576 nic->pdev = pdev;
2577 nic->msg_enable = (1 << debug) - 1;
2608 nic->csr = pci_iomap(pdev, (use_io ? 1 : 0), sizeof(struct csr));
2609 if(!nic->csr) {
2616 nic->flags |= ich;
2618 nic->flags &= ~ich;
2620 e100_get_defaults(nic);
2623 spin_lock_init(&nic->cb_lock);
2624 spin_lock_init(&nic->cmd_lock);
2625 spin_lock_init(&nic->mdio_lock);
2630 e100_hw_reset(nic);
2634 init_timer(&nic->watchdog);
2635 nic->watchdog.function = e100_watchdog;
2636 nic->watchdog.data = (unsigned long)nic;
2637 init_timer(&nic->blink_timer);
2638 nic->blink_timer.function = e100_blink_led;
2639 nic->blink_timer.data = (unsigned long)nic;
2641 INIT_WORK(&nic->tx_timeout_task, e100_tx_timeout_task);
2643 if((err = e100_alloc(nic))) {
2648 if((err = e100_eeprom_load(nic)))
2651 e100_phy_init(nic);
2653 memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN);
2654 memcpy(netdev->perm_addr, nic->eeprom, ETH_ALEN);
2668 if((nic->mac >= mac_82558_D101_A4) &&
2669 (nic->eeprom[eeprom_id] & eeprom_id_wol))
2670 nic->flags |= wol_magic;
2692 e100_free(nic);
2694 pci_iounmap(pdev, nic->csr);
2710 struct nic *nic = netdev_priv(netdev);
2712 e100_free(nic);
2713 iounmap(nic->csr);
2725 struct nic *nic = netdev_priv(netdev);
2728 netif_poll_disable(nic->netdev);
2729 del_timer_sync(&nic->watchdog);
2730 netif_carrier_off(nic->netdev);
2735 if ((nic->flags & wol_magic) | e100_asf(nic)) {
2753 struct nic *nic = netdev_priv(netdev);
2762 e100_up(nic);
2771 struct nic *nic = netdev_priv(netdev);
2774 netif_poll_disable(nic->netdev);
2775 del_timer_sync(&nic->watchdog);
2776 netif_carrier_off(nic->netdev);
2778 if ((nic->flags & wol_magic) | e100_asf(nic)) {
2821 struct nic *nic = netdev_priv(netdev);
2832 e100_hw_reset(nic);
2833 e100_phy_init(nic);
2848 struct nic *nic = netdev_priv(netdev);
2856 mod_timer(&nic->watchdog, jiffies);