Lines Matching refs:hw
81 return readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset);
86 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value);
91 readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
96 writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
101 return readreg(cs->hw.niccy.hscx_ale,
102 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0));
108 writereg(cs->hw.niccy.hscx_ale,
109 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0), value);
112 #define READHSCX(cs, nr, reg) readreg(cs->hw.niccy.hscx_ale, \
113 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0))
114 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.niccy.hscx_ale, \
115 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0), data)
117 #define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.niccy.hscx_ale, \
118 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
120 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.niccy.hscx_ale, \
121 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
134 ival = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
139 outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
141 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx,
146 val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA);
150 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx,
157 val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA);
163 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0xFF);
164 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40,
166 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0xFF);
167 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0);
168 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0);
169 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40,0);
179 val = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
181 outl(val, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
182 release_region(cs->hw.niccy.cfg_reg, 0x40);
183 release_region(cs->hw.niccy.isac, 4);
185 release_region(cs->hw.niccy.isac, 2);
186 release_region(cs->hw.niccy.isac_ale, 2);
195 val = inl(cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
197 outl(val, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
280 cs->hw.niccy.isac = card->para[1] + ISAC_PNP;
281 cs->hw.niccy.hscx = card->para[1] + HSCX_PNP;
282 cs->hw.niccy.isac_ale = card->para[2] + ISAC_PNP;
283 cs->hw.niccy.hscx_ale = card->para[2] + HSCX_PNP;
284 cs->hw.niccy.cfg_reg = 0;
287 if (!request_region(cs->hw.niccy.isac, 2, "niccy data")) {
290 cs->hw.niccy.isac, cs->hw.niccy.isac + 1);
293 if (!request_region(cs->hw.niccy.isac_ale, 2, "niccy addr")) {
296 cs->hw.niccy.isac_ale,
297 cs->hw.niccy.isac_ale + 1);
298 release_region(cs->hw.niccy.isac, 2);
317 cs->hw.niccy.cfg_reg = pci_resource_start(niccy_dev, 0);
318 if (!cs->hw.niccy.cfg_reg) {
335 cs->hw.niccy.isac = pci_ioaddr + ISAC_PCI_DATA;
336 cs->hw.niccy.isac_ale = pci_ioaddr + ISAC_PCI_ADDR;
337 cs->hw.niccy.hscx = pci_ioaddr + HSCX_PCI_DATA;
338 cs->hw.niccy.hscx_ale = pci_ioaddr + HSCX_PCI_ADDR;
339 if (!request_region(cs->hw.niccy.isac, 4, "niccy")) {
343 cs->hw.niccy.isac, cs->hw.niccy.isac + 4);
346 if (!request_region(cs->hw.niccy.cfg_reg, 0x40, "niccy pci")) {
350 cs->hw.niccy.cfg_reg,
351 cs->hw.niccy.cfg_reg + 0x40);
352 release_region(cs->hw.niccy.isac, 4);
363 cs->irq, cs->hw.niccy.isac, cs->hw.niccy.isac_ale);