Lines Matching refs:bcs
403 Memhscx_empty_fifo(struct BCState *bcs, int count)
406 struct IsdnCardState *cs = bcs->cs;
412 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) {
415 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80);
416 bcs->hw.hscx.rcvidx = 0;
419 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
422 *ptr++ = memreadreg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0);
423 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80);
424 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
425 bcs->hw.hscx.rcvidx += count;
427 char *t = bcs->blog;
430 bcs->hw.hscx.hscx ? 'B' : 'A', count);
432 debugl1(cs, bcs->blog);
437 Memhscx_fill_fifo(struct BCState *bcs)
439 struct IsdnCardState *cs = bcs->cs;
447 if (!bcs->tx_skb)
449 if (bcs->tx_skb->len <= 0)
452 more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0;
453 if (bcs->tx_skb->len > fifo_size) {
457 count = bcs->tx_skb->len;
459 MemwaitforXFW(cs, bcs->hw.hscx.hscx);
460 p = ptr = bcs->tx_skb->data;
461 skb_pull(bcs->tx_skb, count);
462 bcs->tx_cnt -= count;
463 bcs->hw.hscx.count += count;
465 memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0,
467 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, more ? 0x8 : 0xa);
469 char *t = bcs->blog;
472 bcs->hw.hscx.hscx ? 'B' : 'A', count);
474 debugl1(cs, bcs->blog);
482 struct BCState *bcs = cs->bcs + hscx;
487 if (!test_bit(BC_FLG_INIT, &bcs->Flag))
496 if ((r & 0x40) && bcs->mode)
499 bcs->mode);
509 Memhscx_empty_fifo(bcs, count);
510 if ((count = bcs->hw.hscx.rcvidx - 1) > 0) {
516 memcpy(skb_put(skb, count), bcs->hw.hscx.rcvbuf, count);
517 skb_queue_tail(&bcs->rqueue, skb);
521 bcs->hw.hscx.rcvidx = 0;
522 schedule_event(bcs, B_RCVBUFREADY);
525 Memhscx_empty_fifo(bcs, fifo_size);
526 if (bcs->mode == L1_MODE_TRANS) {
531 memcpy(skb_put(skb, fifo_size), bcs->hw.hscx.rcvbuf, fifo_size);
532 skb_queue_tail(&bcs->rqueue, skb);
534 bcs->hw.hscx.rcvidx = 0;
535 schedule_event(bcs, B_RCVBUFREADY);
539 if (bcs->tx_skb) {
540 if (bcs->tx_skb->len) {
541 Memhscx_fill_fifo(bcs);
544 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
545 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
547 spin_lock_irqsave(&bcs->aclock, flags);
548 bcs->ackcnt += bcs->hw.hscx.count;
549 spin_unlock_irqrestore(&bcs->aclock, flags);
550 schedule_event(bcs, B_ACKPENDING);
552 dev_kfree_skb_irq(bcs->tx_skb);
553 bcs->hw.hscx.count = 0;
554 bcs->tx_skb = NULL;
557 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
558 bcs->hw.hscx.count = 0;
559 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
560 Memhscx_fill_fifo(bcs);
562 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
563 schedule_event(bcs, B_XMTBUFREADY);
573 struct BCState *bcs;
576 bcs = cs->bcs + 1;
579 if (bcs->mode == 1)
580 Memhscx_fill_fifo(bcs);
585 if (bcs->tx_skb) {
586 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
587 bcs->tx_cnt += bcs->hw.hscx.count;
588 bcs->hw.hscx.count = 0;
590 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x01);
603 bcs = cs->bcs;
606 if (bcs->mode == L1_MODE_TRANS)
607 Memhscx_fill_fifo(bcs);
612 if (bcs->tx_skb) {
613 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
614 bcs->tx_cnt += bcs->hw.hscx.count;
615 bcs->hw.hscx.count = 0;
617 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x01);