Lines Matching refs:adr
46 readreg(unsigned int ale, unsigned int adr, u_char off)
51 ret = bytein(adr);
56 readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
59 insb(adr, data, size);
64 writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
67 byteout(adr, data);
71 writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
74 outsb(adr, data, size);
82 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset));
88 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset, value);
94 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
100 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
106 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80));
112 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80, value);
118 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
124 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
130 return (readreg(cs->hw.asus.adr,
137 writereg(cs->hw.asus.adr,
145 #define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \
147 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.asus.adr, \
150 #define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.asus.adr, \
153 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.asus.adr, \
166 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
170 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA);
174 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
180 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA);
186 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0xFF);
187 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0xFF);
188 writereg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_MASK, 0xFF);
189 writereg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_MASK, 0x0);
190 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0x0);
191 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0x0);
204 ista = readreg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ISTA);
209 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
220 val = 0xfe & readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA | 0x80);
229 ista = readreg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ISTA);
236 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_MASK, 0xFF);
237 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_MASK, 0xC0);
255 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_POTA2, 0x20);
257 byteout(cs->hw.asus.adr, ASUS_RESET); /* Reset On */
260 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_POTA2, 0x0);
262 byteout(cs->hw.asus.adr, 0); /* Reset Off */
265 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_CONF, 0x0);
266 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ACFG, 0xff);
267 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_AOE, 0x0);
268 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_MASK, 0xc0);
269 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_PCFG, 0x12);
396 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_IPAC_ALE;
408 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_ADR;