Lines Matching refs:dd
334 static void hwerr_crcbits(struct ipath_devdata *dd, ipath_err_t hwerrs,
341 if (dd->ipath_flags & IPATH_8BIT_IN_HT0)
344 if (dd->ipath_flags & IPATH_8BIT_IN_HT1)
367 if (pci_read_config_word(dd->pcidev,
368 dd->ipath_ht_slave_off + 0x4,
370 dev_info(&dd->pcidev->dev, "Couldn't read "
379 if (pci_read_config_word(dd->pcidev,
380 dd->ipath_ht_slave_off + 0x8,
382 dev_info(&dd->pcidev->dev, "Couldn't read "
393 dd->ipath_hwerrmask &= ~crcbits;
394 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
395 dd->ipath_hwerrmask);
426 * @dd: the infinipath device
435 static void ipath_ht_handle_hwerrors(struct ipath_devdata *dd, char *msg,
443 hwerrs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus);
454 ipath_dev_err(dd, "Read of hardware error status failed "
465 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
468 hwerrs &= dd->ipath_hwerrmask;
475 if ((hwerrs & ~(dd->ipath_lasthwerror | TXE_PIO_PARITY |
478 dev_info(&dd->pcidev->dev, "Hardware error: hwerr=0x%llx "
480 dd->ipath_lasthwerror |= hwerrs;
482 if (hwerrs & ~dd->ipath_hwe_bitsextant)
483 ipath_dev_err(dd, "hwerror interrupt with unknown errors "
485 (hwerrs & ~dd->ipath_hwe_bitsextant));
487 ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
497 if ((hwerrs & TXE_PIO_PARITY) && ipath_ht_txe_recover(dd))
500 ipath_dev_err(dd, "RXE parity, Eager TID error is not "
506 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
534 hwerr_crcbits(dd, hwerrs, msg, msgl);
540 dd->ipath_hwerrmask &= ~INFINIPATH_HWE_MEMBISTFAILED;
541 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
542 dd->ipath_hwerrmask);
557 dd->ipath_hwerrmask &= ~(hwerrs & _IPATH_PLL_FAIL);
558 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
559 dd->ipath_hwerrmask);
567 dd->ipath_hwerrmask &= ~INFINIPATH_HWE_SERDESPLLFAILED;
568 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
569 dd->ipath_hwerrmask);
581 if (dd->ipath_flags & IPATH_INITTED) {
582 ipath_set_linkstate(dd, IPATH_IB_LINKDOWN);
583 ipath_setup_ht_setextled(dd,
586 ipath_dev_err(dd, "Fatal Hardware Error (freeze "
588 dd->ipath_serial);
591 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
593 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
599 dd->ipath_flags &= ~IPATH_INITTED;
604 ipath_dev_err(dd, "%s hardware error\n", msg);
605 if (isfatal && !ipath_diag_inuse && dd->ipath_freezemsg)
610 snprintf(dd->ipath_freezemsg,
611 dd->ipath_freezelen, "{%s}", msg);
618 * @dd: the infinipath device
624 static int ipath_ht_boardname(struct ipath_devdata *dd, char *name,
628 u8 boardrev = dd->ipath_boardrev;
666 ipath_dev_err(dd, "Don't yet know about board "
675 if (dd->ipath_majrev != 3 || (dd->ipath_minrev < 2 ||
676 dd->ipath_minrev > 3)) {
680 ipath_dev_err(dd,
682 dd->ipath_majrev, dd->ipath_minrev);
691 dd->ipath_flags |= IPATH_32BITCOUNTERS;
692 if (dd->ipath_htspeed != 800)
693 ipath_dev_err(dd,
695 dd->ipath_htspeed);
696 if (dd->ipath_boardrev == 7 || dd->ipath_boardrev == 11 ||
697 dd->ipath_boardrev == 6)
698 dd->ipath_flags |= IPATH_GPIO_INTR;
700 dd->ipath_flags |= IPATH_POLL_RX_INTR;
701 if (dd->ipath_boardrev == 8) { /* LS/X-1 */
703 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus);
715 dd->ipath_unit);
716 *dd->ipath_statusp |= IPATH_STATUS_DISABLED;
728 static void ipath_check_htlink(struct ipath_devdata *dd)
733 link_off = dd->ipath_ht_slave_off + i * 4 + 0xd;
734 if (pci_read_config_byte(dd->pcidev, link_off, &linkerr))
735 dev_info(&dd->pcidev->dev, "Couldn't read "
745 if (pci_write_config_byte(dd->pcidev, link_off,
749 if (pci_read_config_byte(dd->pcidev, link_off,
751 dev_info(&dd->pcidev->dev,
755 dev_info(&dd->pcidev->dev,
763 static int ipath_setup_ht_reset(struct ipath_devdata *dd)
780 static void slave_or_pri_blk(struct ipath_devdata *dd, struct pci_dev *pdev,
787 dd->ipath_ht_slave_off = pos;
807 ipath_dev_err(dd, "Couldn't read HT link control%d "
857 ipath_dev_err(dd, "Couldn't read HT link width "
880 dd->ipath_htwidth = width;
883 ipath_dev_err(dd, "Not configured for 16 bit HT "
887 dd->ipath_flags |= IPATH_8BIT_IN_HT0;
897 ipath_dev_err(dd, "Couldn't read HT link frequency "
928 dd->ipath_htspeed = speed;
932 static int ipath_ht_intconfig(struct ipath_devdata *dd)
936 if (dd->ipath_intconfig) {
937 ipath_write_kreg(dd, dd->ipath_kregs->kr_interruptconfig,
938 dd->ipath_intconfig); /* interrupt address */
941 ipath_dev_err(dd, "No interrupts enabled, couldn't setup "
952 struct ipath_devdata *dd = pci_get_drvdata(dev);
953 u64 prev_intconfig = dd->ipath_intconfig;
955 dd->ipath_intconfig = msg->address_lo;
956 dd->ipath_intconfig |= ((u64) msg->address_hi) << 32;
959 * If the previous value of dd->ipath_intconfig is zero, we're
965 ipath_ht_intconfig(dd);
970 * @dd: the infinipath device
978 static int ipath_setup_ht_config(struct ipath_devdata *dd,
985 ipath_dev_err(dd, "Couldn't create interrupt handler: "
989 dd->ipath_irq = ret;
999 ipath_dev_err(dd, "Couldn't find HyperTransport "
1016 slave_or_pri_blk(dd, pdev, pos, cap_type);
1026 * @dd: the infinipath device
1031 static void ipath_setup_ht_cleanup(struct ipath_devdata *dd)
1037 * @dd: the infinipath device
1057 static void ipath_setup_ht_setextled(struct ipath_devdata *dd,
1071 if (dd->ipath_boardrev == 8) { /* LS/X-1 uses different pins */
1077 extctl = (dd->ipath_extctrl & ~INFINIPATH_EXTC_LEDGBLOK_ON)
1085 extctl = dd->ipath_extctrl &
1093 dd->ipath_extctrl = extctl;
1094 ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, extctl);
1097 static void ipath_init_ht_variables(struct ipath_devdata *dd)
1099 dd->ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM;
1100 dd->ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM;
1101 dd->ipath_gpio_sda = IPATH_GPIO_SDA;
1102 dd->ipath_gpio_scl = IPATH_GPIO_SCL;
1104 dd->ipath_i_bitsextant =
1111 dd->ipath_e_bitsextant =
1129 dd->ipath_hwe_bitsextant =
1158 dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
1159 dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
1164 * @dd: the infinipath device
1172 static void ipath_ht_init_hwerrors(struct ipath_devdata *dd)
1177 extsval = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus);
1180 ipath_dev_err(dd, "MemBIST did not complete!\n");
1184 ipath_check_htlink(dd);
1189 if (dd->ipath_flags & IPATH_8BIT_IN_HT0)
1192 if (dd->ipath_flags & IPATH_8BIT_IN_HT1)
1217 if (dd->ipath_boardrev == 4 || dd->ipath_boardrev == 9)
1219 dd->ipath_hwerrmask = val;
1224 * @dd: the infinipath device
1226 static int ipath_ht_bringup_serdes(struct ipath_devdata *dd)
1233 if (ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus) &
1238 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1242 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig0);
1243 config1 = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig1);
1249 ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesstatus),
1251 ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig));
1257 ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);
1267 ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0,
1272 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1288 ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0,
1292 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
1309 INFINIPATH_XGXS_RX_POL_MASK) != dd->ipath_rx_pol_inv ) {
1313 val |= dd->ipath_rx_pol_inv <<
1318 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
1320 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig0);
1328 ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig1, config1);
1334 ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesstatus),
1336 ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig));
1338 if (!ipath_waitfor_mdio_cmdready(dd)) {
1339 ipath_write_kreg(dd, dd->ipath_kregs->kr_mdio,
1343 if (ipath_waitfor_complete(dd, dd->ipath_kregs->kr_mdio,
1358 * @dd: the infinipath device
1361 static void ipath_ht_quiet_serdes(struct ipath_devdata *dd)
1363 u64 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig0);
1368 ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);
1373 * @dd: the infinipath device
1382 static void ipath_ht_put_tid(struct ipath_devdata *dd,
1386 if (!dd->ipath_kregbase)
1389 if (pa != dd->ipath_tidinvalid) {
1391 dev_info(&dd->pcidev->dev,
1397 pa |= dd->ipath_tidtemplate;
1411 * @dd: the infinipath device
1416 static void ipath_ht_clear_tids(struct ipath_devdata *dd, unsigned port)
1421 if (!dd->ipath_kregbase)
1431 tidbase = (u64 __iomem *) ((char __iomem *)(dd->ipath_kregbase) +
1432 dd->ipath_rcvtidbase +
1433 port * dd->ipath_rcvtidcnt *
1435 for (i = 0; i < dd->ipath_rcvtidcnt; i++)
1436 ipath_ht_put_tid(dd, &tidbase[i], 1, dd->ipath_tidinvalid);
1438 tidbase = (u64 __iomem *) ((char __iomem *)(dd->ipath_kregbase) +
1439 dd->ipath_rcvegrbase +
1440 port * dd->ipath_rcvegrcnt *
1443 for (i = 0; i < dd->ipath_rcvegrcnt; i++)
1444 ipath_ht_put_tid(dd, &tidbase[i], 0, dd->ipath_tidinvalid);
1449 * @dd: the infinipath device
1453 static void ipath_ht_tidtemplate(struct ipath_devdata *dd)
1455 dd->ipath_tidtemplate = dd->ipath_ibmaxlen >> 2;
1456 dd->ipath_tidtemplate <<= INFINIPATH_RT_BUFSIZE_SHIFT;
1457 dd->ipath_tidtemplate |= INFINIPATH_RT_VALID;
1459 dd->ipath_tidinvalid = (-1LL & INFINIPATH_RT_BUFSIZE_MASK) <<
1463 static int ipath_ht_early_init(struct ipath_devdata *dd)
1473 dd->ipath_rcvhdrentsize = 16;
1474 dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;
1485 dd->ipath_rcvegrbufsize = dd->ipath_piosize2k;
1491 dd->ipath_ibmaxlen = min(dd->ipath_piosize2k,
1492 dd->ipath_rcvegrbufsize);
1493 dd->ipath_init_ibmaxlen = dd->ipath_ibmaxlen;
1494 ipath_ht_tidtemplate(dd);
1505 for (val32 = 0; val32 < dd->ipath_portcnt; val32++)
1506 ipath_ht_clear_tids(dd, val32);
1517 piobuf = (u32 __iomem *) (((char __iomem *)(dd->ipath_kregbase)) +
1518 dd->ipath_piobufbase);
1519 pioincr = dd->ipath_palign / sizeof(*piobuf);
1520 for (i = 0; i < dd->ipath_piobcnt2k; i++) {
1530 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1533 ipath_get_eeprom_info(dd);
1534 if (dd->ipath_boardrev == 5 && dd->ipath_serial[0] == '1' &&
1535 dd->ipath_serial[1] == '2' && dd->ipath_serial[2] == '8') {
1541 dd->ipath_flags |= IPATH_GPIO_INTR;
1542 dd->ipath_flags &= ~IPATH_POLL_RX_INTR;
1548 static int ipath_ht_txe_recover(struct ipath_devdata *dd)
1553 ipath_dev_err(dd,
1558 dev_info(&dd->pcidev->dev,
1560 ipath_disarm_senderrbufs(dd, 1);
1567 * @dd: the infinipath device
1583 static void ipath_ht_free_irq(struct ipath_devdata *dd)
1585 free_irq(dd->ipath_irq, dd);
1586 ht_destroy_irq(dd->ipath_irq);
1587 dd->ipath_irq = 0;
1588 dd->ipath_intconfig = 0;
1593 * @dd: the infinipath device
1598 void ipath_init_iba6110_funcs(struct ipath_devdata *dd)
1600 dd->ipath_f_intrsetup = ipath_ht_intconfig;
1601 dd->ipath_f_bus = ipath_setup_ht_config;
1602 dd->ipath_f_reset = ipath_setup_ht_reset;
1603 dd->ipath_f_get_boardname = ipath_ht_boardname;
1604 dd->ipath_f_init_hwerrors = ipath_ht_init_hwerrors;
1605 dd->ipath_f_early_init = ipath_ht_early_init;
1606 dd->ipath_f_handle_hwerrors = ipath_ht_handle_hwerrors;
1607 dd->ipath_f_quiet_serdes = ipath_ht_quiet_serdes;
1608 dd->ipath_f_bringup_serdes = ipath_ht_bringup_serdes;
1609 dd->ipath_f_clear_tids = ipath_ht_clear_tids;
1610 dd->ipath_f_put_tid = ipath_ht_put_tid;
1611 dd->ipath_f_cleanup = ipath_setup_ht_cleanup;
1612 dd->ipath_f_setextled = ipath_setup_ht_setextled;
1613 dd->ipath_f_get_base_info = ipath_ht_get_base_info;
1614 dd->ipath_f_free_irq = ipath_ht_free_irq;
1619 dd->ipath_f_tidtemplate = ipath_ht_tidtemplate;
1625 dd->ipath_kregs = &ipath_ht_kregs;
1626 dd->ipath_cregs = &ipath_ht_cregs;
1632 ipath_init_ht_variables(dd);