Lines Matching refs:wr
54 struct c2wr_nsmr_pbl_req *wr; /* PBL WR ptr */
72 wr = kmalloc(c2dev->req_vq.msg_size, GFP_KERNEL);
73 if (!wr) {
76 c2_wr_set_id(wr, CCWR_NSMR_PBL);
83 wr->hdr.context = 0;
84 wr->rnic_handle = c2dev->adapter_handle;
85 wr->stag_index = stag_index; /* already swapped */
86 wr->flags = 0;
90 wr->addrs_length = cpu_to_be32(count);
103 wr->flags = cpu_to_be32(MEM_PBL_COMPLETE);
110 wr->hdr.context = (unsigned long) vq_req;
116 * allocation. The wr needs the start of each virtual page
120 * Just fill in the wr with what is in the array.
126 wr->paddrs[i] =
134 err = vq_send_wr(c2dev, (union c2wr *) wr);
166 kfree(wr);
178 struct c2wr_nsmr_register_req *wr;
201 wr = kmalloc(c2dev->req_vq.msg_size, GFP_KERNEL);
202 if (!wr) {
210 c2_wr_set_id(wr, CCWR_NSMR_REGISTER);
211 wr->hdr.context = (unsigned long) vq_req;
212 wr->rnic_handle = c2dev->adapter_handle;
225 wr->flags = cpu_to_be16(flags);
226 wr->stag_key = 0; //stag_key;
227 wr->va = cpu_to_be64(*va);
228 wr->pd_id = mr->pd->pd_id;
229 wr->pbe_size = cpu_to_be32(page_size);
230 wr->length = cpu_to_be32(length);
231 wr->pbl_depth = cpu_to_be32(pbl_depth);
232 wr->fbo = cpu_to_be32(offset);
234 wr->addrs_length = cpu_to_be32(count);
240 wr->paddrs[i] = cpu_to_be64(addr_list[i]);
251 err = vq_send_wr(c2dev, (union c2wr *) wr);
301 kfree(wr);
308 kfree(wr);
317 struct c2wr_stag_dealloc_req wr; /* work request */
333 c2_wr_set_id(&wr, CCWR_STAG_DEALLOC);
334 wr.hdr.context = (u64) (unsigned long) vq_req;
335 wr.rnic_handle = c2dev->adapter_handle;
336 wr.stag_index = cpu_to_be32(stag_index);
346 err = vq_send_wr(c2dev, (union c2wr *) & wr);