Lines Matching defs:recv
1192 struct ohci_iso_recv *recv;
1196 recv = kmalloc(sizeof(*recv), GFP_KERNEL);
1197 if (!recv)
1200 iso->hostdata = recv;
1201 recv->ohci = ohci;
1202 recv->task_active = 0;
1203 dma_prog_region_init(&recv->prog);
1204 recv->block = NULL;
1211 recv->dma_mode = PACKET_PER_BUFFER_MODE;
1213 recv->dma_mode = BUFFER_FILL_MODE;
1218 if (recv->dma_mode == BUFFER_FILL_MODE) {
1219 recv->buf_stride = PAGE_SIZE;
1222 recv->nblocks = iso->buf_size/PAGE_SIZE - 1;
1223 if (recv->nblocks < 3) {
1230 recv->block_irq_interval = 1;
1232 recv->block_irq_interval = iso->irq_interval *
1233 ((recv->nblocks+1)/iso->buf_packets);
1234 if (recv->block_irq_interval*4 > recv->nblocks)
1235 recv->block_irq_interval = recv->nblocks/4;
1236 if (recv->block_irq_interval < 1)
1237 recv->block_irq_interval = 1;
1242 recv->nblocks = iso->buf_packets;
1243 recv->block_irq_interval = iso->irq_interval;
1244 if (recv->block_irq_interval * 4 > iso->buf_packets)
1245 recv->block_irq_interval = iso->buf_packets / 4;
1246 if (recv->block_irq_interval < 1)
1247 recv->block_irq_interval = 1;
1254 for (recv->buf_stride = 8; recv->buf_stride < max_packet_size;
1255 recv->buf_stride *= 2);
1257 if (recv->buf_stride*iso->buf_packets > iso->buf_size ||
1258 recv->buf_stride > PAGE_SIZE) {
1265 recv->block_reader = 0;
1266 recv->released_bytes = 0;
1267 recv->block_dma = 0;
1268 recv->dma_offset = 0;
1271 if (dma_prog_region_alloc(&recv->prog,
1272 sizeof(struct dma_cmd) * recv->nblocks,
1273 recv->ohci->dev))
1276 recv->block = (struct dma_cmd*) recv->prog.kvirt;
1278 ohci1394_init_iso_tasklet(&recv->task,
1283 if (ohci1394_register_iso_tasklet(recv->ohci, &recv->task) < 0) {
1288 recv->task_active = 1;
1290 /* recv context registers are spaced 32 bytes apart */
1291 ctx = recv->task.context;
1292 recv->ContextControlSet = OHCI1394_IsoRcvContextControlSet + 32 * ctx;
1293 recv->ContextControlClear = OHCI1394_IsoRcvContextControlClear + 32 * ctx;
1294 recv->CommandPtr = OHCI1394_IsoRcvCommandPtr + 32 * ctx;
1295 recv->ContextMatch = OHCI1394_IsoRcvContextMatch + 32 * ctx;
1299 reg_write(recv->ohci, OHCI1394_IRMultiChanMaskHiClear, 0xFFFFFFFF);
1300 reg_write(recv->ohci, OHCI1394_IRMultiChanMaskLoClear, 0xFFFFFFFF);
1308 recv->dma_mode == BUFFER_FILL_MODE ?
1311 recv->nblocks, recv->buf_stride, recv->block_irq_interval);
1322 struct ohci_iso_recv *recv = iso->hostdata;
1325 reg_write(recv->ohci, OHCI1394_IsoRecvIntMaskClear, 1 << recv->task.context);
1328 ohci1394_stop_context(recv->ohci, recv->ContextControlClear, NULL);
1333 struct ohci_iso_recv *recv = iso->hostdata;
1335 if (recv->task_active) {
1337 ohci1394_unregister_iso_tasklet(recv->ohci, &recv->task);
1338 recv->task_active = 0;
1341 dma_prog_region_free(&recv->prog);
1342 kfree(recv);
1349 struct ohci_iso_recv *recv = iso->hostdata;
1355 for (blk = 0; blk < recv->nblocks; blk++) {
1359 struct dma_cmd *cmd = &recv->block[blk];
1365 unsigned long buf_offset = blk * recv->buf_stride;
1367 if (recv->dma_mode == BUFFER_FILL_MODE) {
1376 if (blk == recv->nblocks-1 || (blk % recv->block_irq_interval) == 0) {
1381 control |= recv->buf_stride;
1386 cmd->status = cpu_to_le32(recv->buf_stride);
1390 *prev_branch = cpu_to_le32(dma_prog_region_offset_to_bus(&recv->prog, prog_offset) | 1);
1402 struct ohci_iso_recv *recv = iso->hostdata;
1413 reg_write(recv->ohci, reg, (1 << i));
1417 reg_read(recv->ohci, OHCI1394_IsochronousCycleTimer);
1422 struct ohci_iso_recv *recv = iso->hostdata;
1428 reg_write(recv->ohci, OHCI1394_IRMultiChanMaskLoSet, (1 << i));
1430 reg_write(recv->ohci, OHCI1394_IRMultiChanMaskHiSet, (1 << (i-32)));
1433 reg_write(recv->ohci, OHCI1394_IRMultiChanMaskLoClear, (1 << i));
1435 reg_write(recv->ohci, OHCI1394_IRMultiChanMaskHiClear, (1 << (i-32)));
1441 reg_read(recv->ohci, OHCI1394_IsochronousCycleTimer);
1446 struct ohci_iso_recv *recv = iso->hostdata;
1447 struct ti_ohci *ohci = recv->ohci;
1450 reg_write(recv->ohci, recv->ContextControlClear, 0xFFFFFFFF);
1456 if (recv->dma_mode == BUFFER_FILL_MODE)
1459 reg_write(recv->ohci, recv->ContextControlSet, command);
1466 reg_write(recv->ohci, recv->ContextControlSet, (1 << 28));
1476 reg_write(recv->ohci, recv->ContextControlSet, (1 << 29));
1483 seconds = reg_read(recv->ohci, OHCI1394_IsochronousCycleTimer) >> 25;
1495 struct dma_cmd *cmd = &recv->block[recv->block_dma];
1502 reg_write(recv->ohci, recv->ContextMatch, contextMatch);
1505 command = dma_prog_region_offset_to_bus(&recv->prog,
1506 recv->block_dma * sizeof(struct dma_cmd));
1509 reg_write(recv->ohci, recv->CommandPtr, command);
1512 reg_write(recv->ohci, OHCI1394_IsoRecvIntMaskSet, 1 << recv->task.context);
1517 reg_write(recv->ohci, recv->ContextControlSet, 0x8000);
1522 reg_read(recv->ohci, OHCI1394_IsochronousCycleTimer);
1525 if (!(reg_read(recv->ohci, recv->ContextControlSet) & 0x8000)) {
1528 reg_read(recv->ohci, recv->ContextControlSet));
1535 static void ohci_iso_recv_release_block(struct ohci_iso_recv *recv, int block)
1541 int prev_i = (next_i == 0) ? (recv->nblocks - 1) : (next_i - 1);
1543 struct dma_cmd *next = &recv->block[next_i];
1544 struct dma_cmd *prev = &recv->block[prev_i];
1547 if ((block < 0) || (block > recv->nblocks))
1554 next->status = cpu_to_le32(recv->buf_stride);
1557 prev->branchAddress = cpu_to_le32(dma_prog_region_offset_to_bus(&recv->prog,
1562 if ((prev_i % recv->block_irq_interval) == 0) {
1570 reg_write(recv->ohci, recv->ContextControlSet, (1 << 12));
1573 static void ohci_iso_recv_bufferfill_release(struct ohci_iso_recv *recv,
1577 recv->released_bytes += info->total_len;
1580 while (recv->released_bytes > recv->buf_stride) {
1581 ohci_iso_recv_release_block(recv, recv->block_reader);
1582 recv->block_reader = (recv->block_reader + 1) % recv->nblocks;
1583 recv->released_bytes -= recv->buf_stride;
1589 struct ohci_iso_recv *recv = iso->hostdata;
1590 if (recv->dma_mode == BUFFER_FILL_MODE) {
1591 ohci_iso_recv_bufferfill_release(recv, info);
1593 ohci_iso_recv_release_block(recv, info - iso->infos);
1598 static void ohci_iso_recv_bufferfill_parse(struct hpsb_iso *iso, struct ohci_iso_recv *recv)
1602 struct ti_ohci *ohci = recv->ohci;
1605 /* we expect the next parsable packet to begin at recv->dma_offset */
1614 unsigned int this_block = recv->dma_offset/recv->buf_stride;
1625 if (this_block == recv->block_dma)
1635 len = p[recv->dma_offset+2] | (p[recv->dma_offset+3] << 8);
1642 channel = p[recv->dma_offset+1] & 0x3F;
1643 tag = p[recv->dma_offset+1] >> 6;
1644 sy = p[recv->dma_offset+0] & 0xF;
1647 recv->dma_offset += 4;
1650 if (recv->dma_offset >= recv->buf_stride*recv->nblocks) {
1651 recv->dma_offset -= recv->buf_stride*recv->nblocks;
1655 offset = recv->dma_offset;
1658 recv->dma_offset += len;
1663 recv->dma_offset += 4 - (len%4);
1668 if (recv->dma_offset >= recv->buf_stride*recv->nblocks) {
1674 int guard_off = recv->buf_stride*recv->nblocks;
1677 if (tail_len > 0 && tail_len < recv->buf_stride) {
1683 recv->dma_offset -= recv->buf_stride*recv->nblocks;
1687 cycle = p[recv->dma_offset+0] | (p[recv->dma_offset+1]<<8);
1691 recv->dma_offset += 4;
1694 if (recv->dma_offset >= recv->buf_stride*recv->nblocks) {
1695 recv->dma_offset -= recv->buf_stride*recv->nblocks;
1705 static void ohci_iso_recv_bufferfill_task(struct hpsb_iso *iso, struct ohci_iso_recv *recv)
1708 struct ti_ohci *ohci = recv->ohci;
1711 for (loop = 0; loop < recv->nblocks; loop++) {
1714 struct dma_cmd *im = &recv->block[recv->block_dma];
1744 dma_region_sync_for_cpu(&iso->data_buf, recv->block_dma*recv->buf_stride, recv->buf_stride);
1747 im->status = recv->buf_stride;
1750 recv->block_dma = (recv->block_dma + 1) % recv->nblocks;
1752 if ((recv->block_dma+1) % recv->nblocks == recv->block_reader) {
1760 ohci_iso_recv_bufferfill_parse(iso, recv);
1763 static void ohci_iso_recv_packetperbuf_task(struct hpsb_iso *iso, struct ohci_iso_recv *recv)
1767 struct ti_ohci *ohci = recv->ohci;
1770 for (count = 0; count < recv->nblocks; count++) {
1774 struct dma_cmd *il = ((struct dma_cmd*) recv->prog.kvirt) + iso->pkt_dma;
1792 packet_len = recv->buf_stride - rescount;
1801 dma_region_sync_for_cpu(&iso->data_buf, iso->pkt_dma * recv->buf_stride, recv->buf_stride);
1812 offset = iso->pkt_dma * recv->buf_stride;
1825 recv->buf_stride, cycle, channel, tag, sy);
1829 il->status = recv->buf_stride;
1832 recv->block_dma = iso->pkt_dma;
1843 struct ohci_iso_recv *recv = iso->hostdata;
1845 if (recv->dma_mode == BUFFER_FILL_MODE)
1846 ohci_iso_recv_bufferfill_task(iso, recv);
1848 ohci_iso_recv_packetperbuf_task(iso, recv);