Lines Matching refs:hwif
119 sgiioc4_checkirq(ide_hwif_t * hwif)
122 hwif->io_ports[IDE_IRQ_OFFSET] + IOC4_INTR_REG * 4;
136 ide_hwif_t *hwif = HWIF(drive);
138 hwif->io_ports[IDE_IRQ_OFFSET] + (IOC4_INTR_REG << 2);
164 readl((void __iomem *)hwif->io_ports[IDE_IRQ_OFFSET]);
166 readl((void __iomem *)(hwif->io_ports[IDE_IRQ_OFFSET] + 4));
167 pci_read_config_dword(hwif->pci_dev, PCI_COMMAND,
178 pci_write_config_dword(hwif->pci_dev, PCI_COMMAND,
193 ide_hwif_t *hwif = HWIF(drive);
194 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4;
202 sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base)
222 ide_hwif_t *hwif = HWIF(drive);
223 unsigned long dma_base = hwif->dma_base;
225 unsigned long *ending_dma = ide_get_hwifdata(hwif);
229 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
289 drive->hwif->dma_host_off(drive);
356 ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
362 printk(KERN_INFO "%s: BM-DMA at 0x%04lx-0x%04lx\n", hwif->name,
365 if (!request_mem_region(dma_base, num_ports, hwif->name)) {
369 __FUNCTION__, hwif->name, (void *) dma_base,
378 __FUNCTION__, hwif->name, dma_base, dma_base + num_ports - 1);
381 hwif->dma_base = (unsigned long) virt_dma_base;
383 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
385 &hwif->dmatable_dma);
387 if (!hwif->dmatable_cpu)
390 hwif->sg_max_nents = IOC4_PRD_ENTRIES;
392 pad = pci_alloc_consistent(hwif->pci_dev, IOC4_IDE_CACHELINE_SIZE,
393 (dma_addr_t *) &(hwif->dma_status));
396 ide_set_hwifdata(hwif, pad);
400 pci_free_consistent(hwif->pci_dev,
402 hwif->dmatable_cpu, hwif->dmatable_dma);
405 __FUNCTION__, hwif->name);
407 "Changing from DMA to PIO mode for Drive %s\n", hwif->name);
417 hwif->autodma = 0;
418 hwif->atapi_dma = 0;
426 ide_hwif_t *hwif = HWIF(drive);
427 unsigned long dma_base = hwif->dma_base;
438 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
453 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
462 dma_addr = cpu_to_le32(hwif->dmatable_dma);
466 memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE);
467 ending_dma_addr = cpu_to_le32(hwif->dma_status);
486 ide_hwif_t *hwif = HWIF(drive);
487 unsigned int *table = hwif->dmatable_cpu;
491 hwif->sg_nents = i = ide_build_sglist(drive, rq);
496 sg = hwif->sg_table;
544 pci_unmap_sg(hwif->pci_dev, hwif->sg_table, hwif->sg_nents,
545 hwif->sg_dma_direction);
580 ide_init_sgiioc4(ide_hwif_t * hwif)
582 hwif->mmio = 1;
583 hwif->autodma = 1;
584 hwif->atapi_dma = 1;
585 hwif->ultra_mask = 0x0; /* Disable Ultra DMA */
586 hwif->mwdma_mask = 0x2; /* Multimode-2 DMA */
587 hwif->swdma_mask = 0x2;
588 hwif->tuneproc = NULL; /* Sets timing for PIO mode */
589 hwif->speedproc = NULL; /* Sets timing for DMA &/or PIO modes */
590 hwif->selectproc = NULL;/* Use the default routine to select drive */
591 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */
592 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */
593 hwif->resetproc = &sgiioc4_resetproc;/* Reset DMA engine,
595 hwif->intrproc = NULL; /* Enable or Disable interrupt from drive */
596 hwif->maskproc = &sgiioc4_maskproc; /* Mask on/off NIEN register */
597 hwif->quirkproc = NULL;
598 hwif->busproc = NULL;
600 hwif->dma_setup = &sgiioc4_ide_dma_setup;
601 hwif->dma_start = &sgiioc4_ide_dma_start;
602 hwif->ide_dma_end = &sgiioc4_ide_dma_end;
603 hwif->ide_dma_check = &sgiioc4_ide_dma_check;
604 hwif->ide_dma_on = &sgiioc4_ide_dma_on;
605 hwif->dma_off_quietly = &sgiioc4_dma_off_quietly;
606 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq;
607 hwif->dma_host_on = &sgiioc4_dma_host_on;
608 hwif->dma_host_off = &sgiioc4_dma_host_off;
609 hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq;
610 hwif->ide_dma_timeout = &__ide_dma_timeout;
612 hwif->INB = &sgiioc4_INB;
621 ide_hwif_t *hwif;
628 hwif = &ide_hwifs[h];
629 if (hwif->chipset == ide_unknown)
652 hwif->name)) {
656 __FUNCTION__, hwif->name, (void *) cmd_phys_base,
661 if (hwif->io_ports[IDE_DATA_OFFSET] != cmd_base) {
663 sgiioc4_init_hwif_ports(&hwif->hw, cmd_base, ctl, irqport);
664 memcpy(hwif->io_ports, hwif->hw.io_ports,
665 sizeof (hwif->io_ports));
666 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
669 hwif->irq = dev->irq;
670 hwif->chipset = ide_pci;
671 hwif->pci_dev = dev;
672 hwif->channel = 0; /* Single Channel chip */
673 hwif->cds = (struct ide_pci_device_s *) d;
674 hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */
677 default_hwif_mmiops(hwif);
682 ide_init_sgiioc4(hwif);
685 ide_dma_sgiioc4(hwif, dma_base);
688 hwif->name, d->name);
690 if (probe_hwif_init(hwif))
694 ide_proc_register_port(hwif);