Lines Matching refs:hwif
205 ide_hwif_t *hwif = HWIF(drive);
206 struct scatterlist *sg = hwif->sg_table;
213 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
215 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
217 return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
238 ide_hwif_t *hwif = HWIF(drive);
239 unsigned int *table = hwif->dmatable_cpu;
240 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
245 hwif->sg_nents = i = ide_build_sglist(drive, rq);
250 sg = hwif->sg_table;
308 pci_unmap_sg(hwif->pci_dev,
309 hwif->sg_table,
310 hwif->sg_nents,
311 hwif->sg_dma_direction);
354 if ((id->capability & 1) && drive->hwif->autodma) {
394 ide_hwif_t *hwif = HWIF(drive);
395 u8 dma_stat = hwif->INB(hwif->dma_status);
428 ide_hwif_t *hwif = HWIF(drive);
430 u8 dma_stat = hwif->INB(hwif->dma_status);
432 hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
449 drive->hwif->dma_host_off(drive);
466 drive->hwif->dma_off_quietly(drive);
483 ide_hwif_t *hwif = HWIF(drive);
485 u8 dma_stat = hwif->INB(hwif->dma_status);
487 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
509 drive->hwif->dma_host_on(drive);
545 ide_hwif_t *hwif = drive->hwif;
562 if (hwif->mmio)
563 writel(hwif->dmatable_dma, (void __iomem *)hwif->dma_prdtable);
565 outl(hwif->dmatable_dma, hwif->dma_prdtable);
568 hwif->OUTB(reading, hwif->dma_command);
571 dma_stat = hwif->INB(hwif->dma_status);
574 hwif->OUTB(dma_stat|6, hwif->dma_status);
589 ide_hwif_t *hwif = HWIF(drive);
590 u8 dma_cmd = hwif->INB(hwif->dma_command);
598 hwif->OUTB(dma_cmd|1, hwif->dma_command);
599 hwif->dma = 1;
608 ide_hwif_t *hwif = HWIF(drive);
613 dma_cmd = hwif->INB(hwif->dma_command);
615 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
617 dma_stat = hwif->INB(hwif->dma_status);
619 hwif->OUTB(dma_stat|6, hwif->dma_status);
623 hwif->dma = 0;
633 ide_hwif_t *hwif = HWIF(drive);
634 u8 dma_stat = hwif->INB(hwif->dma_status);
678 ide_hwif_t *hwif = drive->hwif;
686 mask = id->dma_ultra & hwif->ultra_mask;
688 if (hwif->udma_filter)
689 mask &= hwif->udma_filter(drive);
696 mask = id->dma_mword & hwif->mwdma_mask;
700 mask = id->dma_1word & hwif->swdma_mask;
721 ide_hwif_t *hwif = drive->hwif;
726 if (drive->media != ide_disk && hwif->atapi_dma == 0)
761 if (drive->hwif->speedproc(drive, speed))
772 ide_hwif_t *hwif = HWIF(drive);
777 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
815 hwif->dma_off_quietly(drive);
823 ide_hwif_t *hwif = drive->hwif;
826 rc = hwif->ide_dma_check(drive);
830 hwif->dma_off_quietly(drive);
833 return hwif->ide_dma_on(drive);
869 static int ide_release_dma_engine(ide_hwif_t *hwif)
871 if (hwif->dmatable_cpu) {
872 pci_free_consistent(hwif->pci_dev,
874 hwif->dmatable_cpu,
875 hwif->dmatable_dma);
876 hwif->dmatable_cpu = NULL;
881 static int ide_release_iomio_dma(ide_hwif_t *hwif)
883 release_region(hwif->dma_base, 8);
884 if (hwif->extra_ports)
885 release_region(hwif->extra_base, hwif->extra_ports);
892 int ide_release_dma(ide_hwif_t *hwif)
894 ide_release_dma_engine(hwif);
896 if (hwif->mmio)
899 return ide_release_iomio_dma(hwif);
902 static int ide_allocate_dma_engine(ide_hwif_t *hwif)
904 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
906 &hwif->dmatable_dma);
908 if (hwif->dmatable_cpu)
912 hwif->cds->name);
917 static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
919 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
921 hwif->dma_base = base;
923 if(hwif->mate)
924 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
926 hwif->dma_master = base;
930 static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
933 hwif->name, base, base + ports - 1);
935 if (!request_region(base, ports, hwif->name)) {
940 hwif->dma_base = base;
942 if (hwif->cds->extra) {
943 hwif->extra_base = base + (hwif->channel ? 8 : 16);
945 if (!hwif->mate || !hwif->mate->extra_ports) {
946 if (!request_region(hwif->extra_base,
947 hwif->cds->extra, hwif->cds->name)) {
952 hwif->extra_ports = hwif->cds->extra;
956 if(hwif->mate)
957 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base:base;
959 hwif->dma_master = base;
963 static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
965 if (hwif->mmio)
966 return ide_mapped_mmio_dma(hwif, base,ports);
968 return ide_iomio_dma(hwif, base, ports);
974 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
976 if (ide_dma_iobase(hwif, dma_base, num_ports))
979 if (ide_allocate_dma_engine(hwif)) {
980 ide_release_dma(hwif);
984 if (!(hwif->dma_command))
985 hwif->dma_command = hwif->dma_base;
986 if (!(hwif->dma_vendor1))
987 hwif->dma_vendor1 = (hwif->dma_base + 1);
988 if (!(hwif->dma_status))
989 hwif->dma_status = (hwif->dma_base + 2);
990 if (!(hwif->dma_vendor3))
991 hwif->dma_vendor3 = (hwif->dma_base + 3);
992 if (!(hwif->dma_prdtable))
993 hwif->dma_prdtable = (hwif->dma_base + 4);
995 if (!hwif->dma_off_quietly)
996 hwif->dma_off_quietly = &ide_dma_off_quietly;
997 if (!hwif->dma_host_off)
998 hwif->dma_host_off = &ide_dma_host_off;
999 if (!hwif->ide_dma_on)
1000 hwif->ide_dma_on = &__ide_dma_on;
1001 if (!hwif->dma_host_on)
1002 hwif->dma_host_on = &ide_dma_host_on;
1003 if (!hwif->ide_dma_check)
1004 hwif->ide_dma_check = &__ide_dma_check;
1005 if (!hwif->dma_setup)
1006 hwif->dma_setup = &ide_dma_setup;
1007 if (!hwif->dma_exec_cmd)
1008 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
1009 if (!hwif->dma_start)
1010 hwif->dma_start = &ide_dma_start;
1011 if (!hwif->ide_dma_end)
1012 hwif->ide_dma_end = &__ide_dma_end;
1013 if (!hwif->ide_dma_test_irq)
1014 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
1015 if (!hwif->ide_dma_timeout)
1016 hwif->ide_dma_timeout = &__ide_dma_timeout;
1017 if (!hwif->ide_dma_lostirq)
1018 hwif->ide_dma_lostirq = &__ide_dma_lostirq;
1020 if (hwif->chipset != ide_trm290) {
1021 u8 dma_stat = hwif->INB(hwif->dma_status);
1023 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
1024 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
1028 BUG_ON(!hwif->dma_master);