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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/firewire/

Lines Matching refs:reg_write

203 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data)
226 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr));
236 reg_write(ohci, OHCI1394_PhyControl,
275 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE);
431 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ab_bus | 1);
432 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN);
549 reg_write(ohci, COMMAND_PTR(ctx->regs),
551 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0);
552 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra);
570 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE);
579 reg_write(ctx->ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN);
822 reg_write(ohci, OHCI1394_CSRData, lock_data);
823 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg);
824 reg_write(ohci, OHCI1394_CSRControl, sel);
957 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset);
981 reg_write(ohci, OHCI1394_BusOptions,
984 reg_write(ohci, OHCI1394_ConfigROMhdr, ohci->next_header);
1004 reg_write(ohci, OHCI1394_IntEventClear, event);
1022 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event);
1031 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event);
1052 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset);
1081 reg_write(ohci, OHCI1394_HCControlSet,
1087 reg_write(ohci, OHCI1394_HCControlClear,
1090 reg_write(ohci, OHCI1394_LinkControlSet,
1095 reg_write(ohci, OHCI1394_ATRetries,
1103 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus);
1104 reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000);
1105 reg_write(ohci, OHCI1394_IntEventClear, ~0);
1106 reg_write(ohci, OHCI1394_IntMaskClear, ~0);
1107 reg_write(ohci, OHCI1394_IntMaskSet,
1132 reg_write(ohci, OHCI1394_ConfigROMhdr, 0);
1133 reg_write(ohci, OHCI1394_BusOptions, config_rom[2]);
1134 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus);
1136 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000);
1147 reg_write(ohci, OHCI1394_HCControlSet,
1193 reg_write(ohci, OHCI1394_ConfigROMmap,
1275 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n);
1277 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32));
1443 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index);
1444 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index);
1455 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index);
1456 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index);
1457 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match);
1472 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index);
1475 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index);
1774 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0);
1776 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0);
1780 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0);
1782 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0);
1841 reg_write(ohci, OHCI1394_IntMaskClear, ~0);