Lines Matching refs:vendor
80 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
83 return chip->vendor.locality = l;
90 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
94 chip->vendor.iobase + TPM_ACCESS(l));
106 chip->vendor.iobase + TPM_ACCESS(l));
108 if (chip->vendor.irq) {
109 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
112 chip->vendor.timeout_a);
118 stop = jiffies + chip->vendor.timeout_a;
131 return ioread8(chip->vendor.iobase +
132 TPM_STS(chip->vendor.locality));
139 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
149 stop = jiffies + chip->vendor.timeout_d;
151 burstcnt = ioread8(chip->vendor.iobase +
152 TPM_STS(chip->vendor.locality) + 1);
153 burstcnt += ioread8(chip->vendor.iobase +
154 TPM_STS(chip->vendor.locality) +
175 if (chip->vendor.irq) {
200 chip->vendor.timeout_c,
201 &chip->vendor.read_queue)
205 buf[size++] = ioread8(chip->vendor.iobase +
206 TPM_DATA_FIFO(chip->vendor.
243 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
244 &chip->vendor.int_queue);
254 release_locality(chip, chip->vendor.locality, 0);
259 * If interrupts are used (signaled by an irq set in the vendor structure)
276 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
277 &chip->vendor.int_queue) < 0) {
286 iowrite8(buf[count], chip->vendor.iobase +
287 TPM_DATA_FIFO(chip->vendor.locality));
291 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
292 &chip->vendor.int_queue);
302 chip->vendor.iobase +
303 TPM_DATA_FIFO(chip->vendor.locality));
304 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
305 &chip->vendor.int_queue);
314 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
316 if (chip->vendor.irq) {
321 &chip->vendor.read_queue) < 0) {
329 release_locality(chip, chip->vendor.locality, 0);
385 interrupt = ioread32(chip->vendor.iobase +
386 TPM_INT_STATUS(chip->vendor.locality));
391 chip->vendor.irq = irq;
395 chip->vendor.iobase +
396 TPM_INT_STATUS(chip->vendor.locality));
406 interrupt = ioread32(chip->vendor.iobase +
407 TPM_INT_STATUS(chip->vendor.locality));
413 wake_up_interruptible(&chip->vendor.read_queue);
421 wake_up_interruptible(&chip->vendor.int_queue);
425 chip->vendor.iobase +
426 TPM_INT_STATUS(chip->vendor.locality));
427 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
438 u32 vendor, intfcaps, intmask;
450 chip->vendor.iobase = ioremap(start, len);
451 if (!chip->vendor.iobase) {
456 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
459 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
460 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
461 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
462 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
466 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
470 ioread32(chip->vendor.iobase +
471 TPM_INTF_CAPS(chip->vendor.locality));
499 init_waitqueue_head(&chip->vendor.read_queue);
500 init_waitqueue_head(&chip->vendor.int_queue);
503 ioread32(chip->vendor.iobase +
504 TPM_INT_ENABLE(chip->vendor.locality));
511 chip->vendor.iobase +
512 TPM_INT_ENABLE(chip->vendor.locality));
514 chip->vendor.irq =
515 ioread8(chip->vendor.iobase +
516 TPM_INT_VECTOR(chip->vendor.locality));
518 for (i = 3; i < 16 && chip->vendor.irq == 0; i++) {
519 iowrite8(i, chip->vendor.iobase +
520 TPM_INT_VECTOR(chip->vendor.locality));
523 chip->vendor.miscdev.name, chip) != 0) {
532 (chip->vendor.iobase +
533 TPM_INT_STATUS(chip->vendor.locality)),
534 chip->vendor.iobase +
535 TPM_INT_STATUS(chip->vendor.locality));
539 chip->vendor.iobase +
540 TPM_INT_ENABLE(chip->vendor.locality));
547 chip->vendor.iobase +
548 TPM_INT_ENABLE(chip->vendor.locality));
552 if (chip->vendor.irq) {
553 iowrite8(chip->vendor.irq,
554 chip->vendor.iobase +
555 TPM_INT_VECTOR(chip->vendor.locality));
557 (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
558 chip->vendor.miscdev.name, chip) != 0) {
561 chip->vendor.irq);
562 chip->vendor.irq = 0;
566 (chip->vendor.iobase +
567 TPM_INT_STATUS(chip->vendor.locality)),
568 chip->vendor.iobase +
569 TPM_INT_STATUS(chip->vendor.locality));
573 chip->vendor.iobase +
574 TPM_INT_ENABLE(chip->vendor.locality));
578 INIT_LIST_HEAD(&chip->vendor.list);
580 list_add(&chip->vendor.list, &tis_chips);
588 if (chip->vendor.iobase)
589 iounmap(chip->vendor.iobase);
679 ioread32(chip->vendor.iobase +
680 TPM_INT_ENABLE(chip->vendor.
682 chip->vendor.iobase +
683 TPM_INT_ENABLE(chip->vendor.locality));
684 release_locality(chip, chip->vendor.locality, 1);
685 if (chip->vendor.irq)
686 free_irq(chip->vendor.irq, chip);