Lines Matching refs:HCR
368 #define HCR 0x12 /* Hardware Configuration Register */
4976 /* Hardware Configuration Register (HCR)
4999 /* for DPLL. DPLL mode in HCR is dependent on the encoding used. */
5059 usc_OutReg( info, HCR, RegValue );
5284 /* Hardware Configuration Register (HCR) Clear Bit 1, BRG0
5286 usc_OutReg( info, HCR, (u16)((usc_InReg( info, HCR ) & ~BIT1) | BIT0) );
5344 * Hardware Configuration Register (HCR)
5349 usc_OutReg( info, HCR, (u16)((usc_InReg( info, HCR ) & ~BIT1) | BIT0) );
5355 usc_OutReg( info, HCR, (u16)(usc_InReg( info, HCR ) & ~BIT0) );
6369 * Hardware Configuration Register (HCR)
6374 usc_OutReg( info, HCR,
6375 (u16)((usc_InReg( info, HCR ) & ~BIT1) | BIT0) );
6384 usc_OutReg( info, HCR, (u16)(usc_InReg( info, HCR ) & ~BIT0) );