Lines Matching refs:MODE
265 #define MODE 0x22
3143 /* MODE
3160 write_reg(info, CHB + MODE, val);
3244 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3245 val = read_reg(info, CHA + MODE) | BIT0;
3246 write_reg(info, CHA + MODE, val);
3284 /* MODE
3303 write_reg(info, CHA + MODE, val);
3495 /* MODE:03 RAC Receiver Active, 0=inactive */
3496 clear_reg_bits(info, CHA + MODE, BIT3);
3512 /* MODE:03 RAC Receiver Active, 1=active */
3513 set_reg_bits(info, CHA + MODE, BIT3);
3575 write_reg(info, CHA + MODE, 0);
3576 write_reg(info, CHB + MODE, 0);
3629 /* MODE
3649 write_reg(info, CHA + MODE, val);
3772 /* MODE:03 RAC Receiver Active, 1=active */
3773 set_reg_bits(info, CHA + MODE, BIT3);
3828 val = read_reg(info, CHA + MODE);
3840 write_reg(info, CHA + MODE, val);