Lines Matching refs:UART_LCR
158 __oldlcr = inb((baseio)+UART_LCR); \
159 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
163 outb(__oldlcr, (baseio)+UART_LCR); \
168 __oldlcr = inb((baseio)+UART_LCR); \
169 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
173 outb(__oldlcr, (baseio)+UART_LCR); \
178 __oldlcr = inb((baseio)+UART_LCR); \
179 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
185 outb(__oldlcr, (baseio)+UART_LCR); \
190 __oldlcr = inb((baseio)+UART_LCR); \
191 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
197 outb(__oldlcr, (baseio)+UART_LCR); \
202 __oldlcr = inb((info)->ioaddr+UART_LCR); \
203 outb(MOXA_MUST_ENTER_ENCHANCE, (info)->ioaddr+UART_LCR);\
214 outb(__oldlcr, (info)->ioaddr+UART_LCR); \
219 __oldlcr = inb((baseio)+UART_LCR); \
220 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
226 outb(__oldlcr, (baseio)+UART_LCR); \
231 __oldlcr = inb((baseio)+UART_LCR); \
232 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
238 outb(__oldlcr, (baseio)+UART_LCR); \
243 __oldlcr = inb((baseio)+UART_LCR); \
244 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
248 outb(__oldlcr, (baseio)+UART_LCR); \
253 __oldlcr = inb((baseio)+UART_LCR); \
254 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
259 outb(__oldlcr, (baseio)+UART_LCR); \
264 __oldlcr = inb((baseio)+UART_LCR); \
265 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
269 outb(__oldlcr, (baseio)+UART_LCR); \
274 __oldlcr = inb((baseio)+UART_LCR); \
275 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
280 outb(__oldlcr, (baseio)+UART_LCR); \
285 __oldlcr = inb((baseio)+UART_LCR); \
286 outb(MOXA_MUST_ENTER_ENCHANCE, (baseio)+UART_LCR); \
290 outb(__oldlcr, (baseio)+UART_LCR); \