Lines Matching defs:pSettings
146 int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
151 unsigned short usDspBaseIO = pSettings->usDspBaseIO;
173 "3780i::dsp3780I_EnableDSP entry pSettings->bDSPEnabled %x\n",
174 pSettings->bDSPEnabled);
177 if (!pSettings->bDSPEnabled) {
184 "3780i::dsp3780i_EnableDSP entry pSettings->bModemEnabled %x\n",
185 pSettings->bModemEnabled);
187 if (pSettings->bModemEnabled) {
189 rUartCfg1.IrqActiveLow = pSettings->bUartIrqActiveLow;
190 rUartCfg1.IrqPulse = pSettings->bUartIrqPulse;
192 (unsigned char) pIrqMap[pSettings->usUartIrq];
193 switch (pSettings->usUartBaseIO) {
211 rHBridgeCfg1.IrqActiveLow = pSettings->bDspIrqActiveLow;
212 rHBridgeCfg1.IrqPulse = pSettings->bDspIrqPulse;
213 rHBridgeCfg1.Irq = (unsigned char) pIrqMap[pSettings->usDspIrq];
219 rBusmasterCfg1.Dma = (unsigned char) pDmaMap[pSettings->usDspDma];
221 (unsigned char) pSettings->usNumTransfers;
222 rBusmasterCfg1.ReRequest = (unsigned char) pSettings->usReRequest;
223 rBusmasterCfg1.MEMCS16 = pSettings->bEnableMEMCS16;
225 (unsigned char) pSettings->usIsaMemCmdWidth;
229 rIsaProtCfg.GateIOCHRDY = pSettings->bGateIOCHRDY;
232 rPowerMgmtCfg.Enable = pSettings->bEnablePwrMgmt;
235 (unsigned char) pSettings->usHBusTimerLoadValue;
239 pSettings->bDisableLBusTimeout;
241 MKWORD(rChipReset) = ~pSettings->usChipletEnable;
244 rClockControl1.N_Divisor = pSettings->usN_Divisor;
245 rClockControl1.M_Multiplier = pSettings->usM_Multiplier;
248 rClockControl2.PllBypass = pSettings->bPllBypass;
297 if (pSettings->bModemEnabled) {
328 int dsp3780I_DisableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings)
331 unsigned short usDspBaseIO = pSettings->usDspBaseIO;
358 int dsp3780I_Reset(DSP_3780I_CONFIG_SETTINGS * pSettings)
361 unsigned short usDspBaseIO = pSettings->usDspBaseIO;
394 (unsigned short) (~pSettings->usChipletEnable));
403 int dsp3780I_Run(DSP_3780I_CONFIG_SETTINGS * pSettings)
406 unsigned short usDspBaseIO = pSettings->usDspBaseIO;