Lines Matching defs:pB
113 // Function: iiSetAddress(pB, address, delay)
114 // Parameters: pB - pointer to the board structure
120 // False if there is any error: the pB->i2eError field has the error
130 iiSetAddress( i2eBordStrPtr pB, int address, delayFunc_t delay )
133 pB->i2eValid = I2E_INCOMPLETE;
143 COMPLETE(pB,I2EE_BADADDR);
147 pB->i2eBase = address;
148 pB->i2eData = address + FIFO_DATA;
149 pB->i2eStatus = address + FIFO_STATUS;
150 pB->i2ePointer = address + FIFO_PTR;
151 pB->i2eXMail = address + FIFO_MAIL;
152 pB->i2eXMask = address + FIFO_MASK;
158 pB->i2eDelay = ((delay != (delayFunc_t)NULL) ? delay : (delayFunc_t)ii2Nop);
160 pB->i2eValid = I2E_MAGIC;
161 pB->i2eState = II_STATE_COLD;
163 COMPLETE(pB, I2EE_GOOD);
167 // Function: iiReset(pB)
168 // Parameters: pB - pointer to the board structure
171 // False if there is any error: the pB->i2eError field has the error
183 iiReset(i2eBordStrPtr pB)
186 if (pB->i2eValid != I2E_MAGIC)
188 COMPLETE(pB, I2EE_BADMAGIC);
191 OUTB(pB->i2eBase + FIFO_RESET, 0); // Any data will do
192 iiDelay(pB, 50); // Pause between resets
193 OUTB(pB->i2eBase + FIFO_RESET, 0); // Second reset
206 pB->i2eState = II_STATE_RESET;
214 pB->i2eUsingIrq = IRQ_UNDEFINED; // Not set up to use an interrupt yet
215 pB->i2eWaitingForEmptyFifo = 0;
216 pB->i2eOutMailWaiting = 0;
217 pB->i2eChannelPtr = NULL;
218 pB->i2eChannelCnt = 0;
220 pB->i2eLeadoffWord[0] = 0;
221 pB->i2eFifoInInts = 0;
222 pB->i2eFifoOutInts = 0;
223 pB->i2eFatalTrap = NULL;
224 pB->i2eFatal = 0;
226 COMPLETE(pB, I2EE_GOOD);
230 // Function: iiResetDelay(pB)
231 // Parameters: pB - pointer to the board structure
234 // False if there is any error: the pB->i2eError field has the error
243 iiResetDelay(i2eBordStrPtr pB)
245 if (pB->i2eValid != I2E_MAGIC) {
246 COMPLETE(pB, I2EE_BADMAGIC);
248 if (pB->i2eState != II_STATE_RESET) {
249 COMPLETE(pB, I2EE_BADSTATE);
251 iiDelay(pB,2000); /* Now we wait for two seconds. */
253 COMPLETE(pB, I2EE_GOOD);
257 // Function: iiInitialize(pB)
258 // Parameters: pB - pointer to the board structure
261 // False if there is any error: the pB->i2eError field has the error
266 // in the pB structure.
275 iiInitialize(i2eBordStrPtr pB)
282 if (pB->i2eValid != I2E_MAGIC)
284 COMPLETE(pB, I2EE_BADMAGIC);
287 if (pB->i2eState != II_STATE_RESET || !iiDelayed)
289 COMPLETE(pB, I2EE_BADSTATE);
294 pB->i2eValid = I2E_INCOMPLETE;
302 if (HAS_NO_INPUT(pB))
304 pB->i2ePomSize = itemp;
305 COMPLETE(pB, I2EE_PORM_SHORT);
308 pB->i2ePom.c[itemp] = c = BYTE_FROM(pB);
316 pB->i2ePomSize = itemp+1;
317 COMPLETE(pB, I2EE_BADMAGIC);
321 pB->i2ePomSize = itemp;
324 if (HAS_INPUT(pB))
325 COMPLETE(pB, I2EE_PORM_LONG);
330 if (pB->i2ePom.e.porDiag1 & POR_BAD_MAPPER)
332 COMPLETE(pB, I2EE_POSTERR);
337 switch (pB->i2ePom.e.porID & POR_ID_FAMILY)
341 pB->i2eFifoStyle = FIFO_II;
342 pB->i2eFifoSize = 512; // 512 bytes, always
343 pB->i2eDataWidth16 = NO;
345 pB->i2eMaxIrq = 15; // Because board cannot tell us it is in an 8-bit
348 pB->i2eGoodMap[1] =
349 pB->i2eGoodMap[2] =
350 pB->i2eGoodMap[3] =
351 pB->i2eChannelMap[1] =
352 pB->i2eChannelMap[2] =
353 pB->i2eChannelMap[3] = 0;
355 switch (pB->i2ePom.e.porID & POR_ID_SIZE)
358 pB->i2eGoodMap[0] =
359 pB->i2eChannelMap[0] = 0x0f; // four-port
363 if (pB->i2ePom.e.porPorts1 != 4)
365 COMPLETE(pB, I2EE_INCONSIST);
371 pB->i2eGoodMap[0] =
372 pB->i2eChannelMap[0] = 0xff; // Eight port
373 if (pB->i2ePom.e.porPorts1 != 8)
375 COMPLETE(pB, I2EE_INCONSIST);
380 pB->i2eGoodMap[0] =
381 pB->i2eChannelMap[0] = 0x3f; // Six Port
382 if (pB->i2ePom.e.porPorts1 != 6)
384 COMPLETE(pB, I2EE_INCONSIST);
390 if (pB->i2ePom.e.porDiag1 & POR_BAD_UART1)
392 pB->i2eGoodMap[0] &= ~0x0f;
395 if (pB->i2ePom.e.porDiag1 & POR_BAD_UART2)
397 pB->i2eGoodMap[0] &= ~0xf0;
404 pB->i2eFifoStyle = FIFO_IIEX;
406 itemp = pB->i2ePom.e.porFifoSize;
413 COMPLETE(pB, I2EE_INCONSIST);
415 pB->i2eFifoSize = (1 << itemp);
419 ilimit = pB->i2ePom.e.porNumBoxes;
429 utemp = pB->i2ePom.e.porFlags;
432 pB->i2eChannelMap[0] = 0x000f;
437 pB->i2eChannelMap[itemp] =
445 utemp = (pB->i2ePom.e.porPorts2 << 8) + pB->i2ePom.e.porPorts1;
449 pB->i2eGoodMap[itemp] = 0;
450 if (utemp & 1) pB->i2eGoodMap[itemp] |= 0x000f;
451 if (utemp & 2) pB->i2eGoodMap[itemp] |= 0x00f0;
452 if (utemp & 4) pB->i2eGoodMap[itemp] |= 0x0f00;
453 if (utemp & 8) pB->i2eGoodMap[itemp] |= 0xf000;
458 switch (pB->i2ePom.e.porBus & (POR_BUS_SLOT16 | POR_BUS_DIP16) )
461 pB->i2eDataWidth16 = YES;
462 pB->i2eMaxIrq = 15;
466 pB->i2eDataWidth16 = NO;
467 pB->i2eMaxIrq = 15;
473 pB->i2eDataWidth16 = NO;
474 pB->i2eMaxIrq = 7;
480 COMPLETE(pB, I2EE_BAD_FAMILY);
486 pB->i2eFifoRemains = 0;
490 switch (pB->i2ePom.e.porBus & POR_BUS_TYPE)
494 pB->i2eChangeIrq = YES;
498 pB->i2eChangeIrq = NO;
501 COMPLETE(pB, I2EE_BADBUS);
504 if (pB->i2eDataWidth16 == YES)
506 pB->i2eWriteBuf = iiWriteBuf16;
507 pB->i2eReadBuf = iiReadBuf16;
508 pB->i2eWriteWord = iiWriteWord16;
509 pB->i2eReadWord = iiReadWord16;
511 pB->i2eWriteBuf = iiWriteBuf8;
512 pB->i2eReadBuf = iiReadBuf8;
513 pB->i2eWriteWord = iiWriteWord8;
514 pB->i2eReadWord = iiReadWord8;
517 switch(pB->i2eFifoStyle)
520 pB->i2eWaitForTxEmpty = iiWaitForTxEmptyII;
521 pB->i2eTxMailEmpty = iiTxMailEmptyII;
522 pB->i2eTrySendMail = iiTrySendMailII;
523 pB->i2eGetMail = iiGetMailII;
524 pB->i2eEnableMailIrq = iiEnableMailIrqII;
525 pB->i2eWriteMask = iiWriteMaskII;
530 pB->i2eWaitForTxEmpty = iiWaitForTxEmptyIIEX;
531 pB->i2eTxMailEmpty = iiTxMailEmptyIIEX;
532 pB->i2eTrySendMail = iiTrySendMailIIEX;
533 pB->i2eGetMail = iiGetMailIIEX;
534 pB->i2eEnableMailIrq = iiEnableMailIrqIIEX;
535 pB->i2eWriteMask = iiWriteMaskIIEX;
540 COMPLETE(pB, I2EE_INCONSIST);
544 pB->i2eState = II_STATE_READY; // Ready to load loadware.
552 pB->i2eStartMail = iiGetMail(pB);
555 pB->i2eStartMail = NO_MAIL_HERE;
559 pB->i2eValid = I2E_MAGIC;
560 COMPLETE(pB, I2EE_GOOD);
646 // Function: iiWriteBuf16(pB, address, count)
647 // Parameters: pB - pointer to board structure
652 // False if there is any error: the pB->i2eError field has the error
657 // structure pointer pB. Should count happen to be odd, an extra pad byte is
659 // indirectly through pB->i2eWriteBuf.
663 iiWriteBuf16(i2eBordStrPtr pB, unsigned char *address, int count)
666 if (pB->i2eValid != I2E_MAGIC)
667 COMPLETE(pB, I2EE_INVALID);
669 OUTSW ( pB->i2eData, address, count);
671 COMPLETE(pB, I2EE_GOOD);
675 // Function: iiWriteBuf8(pB, address, count)
676 // Parameters: pB - pointer to board structure
681 // False if there is any error: the pB->i2eError field has the error
686 // structure pointer pB. Should count happen to be odd, an extra pad byte is
688 // Uses 8-bit (byte) operations. Is called indirectly through pB->i2eWriteBuf.
692 iiWriteBuf8(i2eBordStrPtr pB, unsigned char *address, int count)
695 if (pB->i2eValid != I2E_MAGIC)
696 COMPLETE(pB, I2EE_INVALID);
698 OUTSB ( pB->i2eData, address, count );
700 COMPLETE(pB, I2EE_GOOD);
704 // Function: iiReadBuf16(pB, address, count)
705 // Parameters: pB - pointer to board structure
710 // False if there is any error: the pB->i2eError field has the error
715 // structure pointer pB. Should count happen to be odd, an extra pad byte is
717 // indirectly through pB->i2eReadBuf.
721 iiReadBuf16(i2eBordStrPtr pB, unsigned char *address, int count)
724 if (pB->i2eValid != I2E_MAGIC)
725 COMPLETE(pB, I2EE_INVALID);
727 INSW ( pB->i2eData, address, count);
729 COMPLETE(pB, I2EE_GOOD);
733 // Function: iiReadBuf8(pB, address, count)
734 // Parameters: pB - pointer to board structure
739 // False if there is any error: the pB->i2eError field has the error
744 // structure pointer pB. Should count happen to be odd, an extra pad byte is
746 // 8-bit (byte) operations. Is called indirectly through pB->i2eReadBuf.
750 iiReadBuf8(i2eBordStrPtr pB, unsigned char *address, int count)
753 if (pB->i2eValid != I2E_MAGIC)
754 COMPLETE(pB, I2EE_INVALID);
756 INSB ( pB->i2eData, address, count);
758 COMPLETE(pB, I2EE_GOOD);
762 // Function: iiReadWord16(pB)
763 // Parameters: pB - pointer to board structure
766 // False if there is any error: the pB->i2eError field has the error
771 // pointer pB. Uses a 16-bit operation. Is called indirectly through
772 // pB->i2eReadWord.
776 iiReadWord16(i2eBordStrPtr pB)
778 return (unsigned short)( INW(pB->i2eData) );
782 // Function: iiReadWord8(pB)
783 // Parameters: pB - pointer to board structure
786 // False if there is any error: the pB->i2eError field has the error
791 // pointer pB. Uses two 8-bit operations. Bytes are assumed to be LSB first. Is
792 // called indirectly through pB->i2eReadWord.
796 iiReadWord8(i2eBordStrPtr pB)
800 urs = INB ( pB->i2eData );
802 return ( ( INB ( pB->i2eData ) << 8 ) | urs );
806 // Function: iiWriteWord16(pB, value)
807 // Parameters: pB - pointer to board structure
811 // False if there is any error: the pB->i2eError field has the error
816 // pointer pB. Uses 16-bit operation. Is called indirectly through
817 // pB->i2eWriteWord.
821 iiWriteWord16(i2eBordStrPtr pB, unsigned short value)
823 WORD_TO(pB, (int)value);
827 // Function: iiWriteWord8(pB, value)
828 // Parameters: pB - pointer to board structure
832 // False if there is any error: the pB->i2eError field has the error
837 // pointer pB. Uses two 8-bit operations (writes LSB first). Is called
838 // indirectly through pB->i2eWriteWord.
842 iiWriteWord8(i2eBordStrPtr pB, unsigned short value)
844 BYTE_TO(pB, (char)value);
845 BYTE_TO(pB, (char)(value >> 8) );
849 // Function: iiWaitForTxEmptyII(pB, mSdelay)
850 // Parameters: pB - pointer to board structure
854 // False if it not empty in the required time: the pB->i2eError
860 // not empty by the required time, returns false and error in pB->i2eError,
869 // pB->i2eWaitForTxEmpty.
873 iiWaitForTxEmptyII(i2eBordStrPtr pB, int mSdelay)
898 OUTB(pB->i2ePointer, SEL_COMMAND);
899 OUTB(pB->i2ePointer, SEL_CMD_SH);
901 itemp = INB(pB->i2eStatus);
903 OUTB(pB->i2ePointer, SEL_COMMAND);
904 OUTB(pB->i2ePointer, SEL_CMD_UNSH);
908 UPDATE_FIFO_ROOM(pB);
910 COMPLETE(pB, I2EE_GOOD);
918 iiDelay(pB, 1); /* 1 mS granularity on checking condition */
920 COMPLETE(pB, I2EE_TXE_TIME);
924 // Function: iiWaitForTxEmptyIIEX(pB, mSdelay)
925 // Parameters: pB - pointer to board structure
929 // False if it not empty in the required time: the pB->i2eError
935 // not empty by the required time, returns false and error in pB->i2eError,
944 // pB->i2eWaitForTxEmpty.
948 iiWaitForTxEmptyIIEX(i2eBordStrPtr pB, int mSdelay)
962 if (INB(pB->i2eStatus) & STE_OUT_MT) {
963 UPDATE_FIFO_ROOM(pB);
965 COMPLETE(pB, I2EE_GOOD);
972 iiDelay(pB, 1); // 1 mS granularity on checking condition
974 COMPLETE(pB, I2EE_TXE_TIME);
978 // Function: iiTxMailEmptyII(pB)
979 // Parameters: pB - pointer to board structure
993 iiTxMailEmptyII(i2eBordStrPtr pB)
995 int port = pB->i2ePointer;
1001 // Function: iiTxMailEmptyIIEX(pB)
1002 // Parameters: pB - pointer to board structure
1016 iiTxMailEmptyIIEX(i2eBordStrPtr pB)
1018 return !(INB(pB->i2eStatus) & STE_OUT_MAIL);
1022 // Function: iiTrySendMailII(pB,mail)
1023 // Parameters: pB - pointer to board structure
1038 iiTrySendMailII(i2eBordStrPtr pB, unsigned char mail)
1040 int port = pB->i2ePointer;
1052 // Function: iiTrySendMailIIEX(pB,mail)
1053 // Parameters: pB - pointer to board structure
1068 iiTrySendMailIIEX(i2eBordStrPtr pB, unsigned char mail)
1070 if(INB(pB->i2eStatus) & STE_OUT_MAIL) {
1073 OUTB(pB->i2eXMail, mail);
1078 // Function: iiGetMailII(pB,mail)
1079 // Parameters: pB - pointer to board structure
1092 iiGetMailII(i2eBordStrPtr pB)
1094 if (HAS_MAIL(pB)) {
1095 OUTB(pB->i2ePointer, SEL_INMAIL);
1096 return INB(pB->i2ePointer);
1103 // Function: iiGetMailIIEX(pB,mail)
1104 // Parameters: pB - pointer to board structure
1117 iiGetMailIIEX(i2eBordStrPtr pB)
1119 if (HAS_MAIL(pB)) {
1120 return INB(pB->i2eXMail);
1127 // Function: iiEnableMailIrqII(pB)
1128 // Parameters: pB - pointer to board structure
1140 iiEnableMailIrqII(i2eBordStrPtr pB)
1142 OUTB(pB->i2ePointer, SEL_MASK);
1143 OUTB(pB->i2ePointer, ST_IN_MAIL);
1147 // Function: iiEnableMailIrqIIEX(pB)
1148 // Parameters: pB - pointer to board structure
1160 iiEnableMailIrqIIEX(i2eBordStrPtr pB)
1162 OUTB(pB->i2eXMask, MX_IN_MAIL);
1166 // Function: iiWriteMaskII(pB)
1167 // Parameters: pB - pointer to board structure
1179 iiWriteMaskII(i2eBordStrPtr pB, unsigned char value)
1181 OUTB(pB->i2ePointer, SEL_MASK);
1182 OUTB(pB->i2ePointer, value);
1186 // Function: iiWriteMaskIIEX(pB)
1187 // Parameters: pB - pointer to board structure
1199 iiWriteMaskIIEX(i2eBordStrPtr pB, unsigned char value)
1201 OUTB(pB->i2eXMask, value);
1205 // Function: iiDownloadBlock(pB, pSource, isStandard)
1206 // Parameters: pB - pointer to board structure
1214 // Downloads a single block (at pSource)to the board referenced by pB. Caller
1235 iiDownloadBlock ( i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard)
1240 if (pB->i2eValid != I2E_MAGIC) return II_DOWN_BADVALID;
1242 switch(pB->i2eState)
1254 pB->i2eToLoad = 1 + pSource->e.loadBlocksMore;
1259 pB->i2eState = II_STATE_LOADING;
1260 pB->i2eLVersion = pSource->e.loadVersion;
1261 pB->i2eLRevision = pSource->e.loadRevision;
1262 pB->i2eLSub = pSource->e.loadSubRevision;
1280 if (!iiWaitForTxEmpty(pB, MAX_DLOAD_READ_TIME)) {
1284 if (!iiWriteBuf(pB, pSource->c, LOADWARE_BLOCK_SIZE)) {
1293 if (!iiWaitForTxEmpty(pB, MAX_DLOAD_START_TIME)) {
1299 if (--(pB->i2eToLoad)) {
1305 if (!iiWaitForTxEmpty(pB, MAX_DLOAD_READ_TIME)) {
1312 if (HAS_INPUT(pB)) {
1313 switch(BYTE_FROM(pB))
1316 pB->i2eState =
1324 if (pB->i2ePom.e.porDiag2 & POR_DEBUG_PORT) {
1325 iiDelay(pB, 700);
1336 iiDelay(pB, 10); // 10 mS granularity on checking condition
1341 pB->i2eState = II_STATE_BADLOAD;
1346 // Function: iiDownloadAll(pB, pSource, isStandard, size)
1347 // Parameters: pB - pointer to board structure
1365 iiDownloadAll(i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard, int size)
1371 if (pB->i2eState != II_STATE_READY) return II_DOWN_BADSTATE;
1379 status = iiDownloadBlock(pB, pSource++, isStandard);