Lines Matching defs:prim
1473 unsigned int prim;
1481 drm_radeon_tcl_prim_t * prim)
1485 int offset = dev_priv->gart_buffers_offset + buf->offset + prim->start;
1486 int numverts = (int)prim->numverts;
1492 prim->prim,
1493 prim->vc_format, prim->start, prim->finish, prim->numverts);
1495 if (bad_prim_vertex_nr(prim->prim, prim->numverts)) {
1496 DRM_ERROR("bad prim %x numverts %d\n",
1497 prim->prim, prim->numverts);
1513 OUT_RING(prim->vc_format);
1514 OUT_RING(prim->prim | RADEON_PRIM_WALK_LIST |
1578 drm_radeon_tcl_prim_t * prim)
1582 int offset = dev_priv->gart_buffers_offset + prim->offset;
1586 int start = prim->start + RADEON_INDEX_PRIM_OFFSET;
1587 int count = (prim->finish - start) / sizeof(u16);
1591 prim->prim,
1592 prim->vc_format,
1593 prim->start, prim->finish, prim->offset, prim->numverts);
1595 if (bad_prim_vertex_nr(prim->prim, count)) {
1596 DRM_ERROR("bad prim %x count %d\n", prim->prim, count);
1600 if (start >= prim->finish || (prim->start & 0x7)) {
1601 DRM_ERROR("buffer prim %d\n", prim->prim);
1605 dwords = (prim->finish - prim->start + 3) / sizeof(u32);
1608 elt_buf->offset + prim->start);
1612 data[2] = prim->numverts;
1613 data[3] = prim->vc_format;
1614 data[4] = (prim->prim |
1625 prim->start, prim->finish);
2199 drm_radeon_tcl_prim_t prim;
2216 if (vertex.prim < 0 || vertex.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST) {
2217 DRM_ERROR("buffer prim %d\n", vertex.prim);
2256 prim.start = 0;
2257 prim.finish = vertex.count; /* unused */
2258 prim.prim = vertex.prim;
2259 prim.numverts = vertex.count;
2260 prim.vc_format = dev_priv->sarea_priv->vc_format;
2262 radeon_cp_dispatch_vertex(dev, buf, &prim);
2282 drm_radeon_tcl_prim_t prim;
2300 if (elts.prim < 0 || elts.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST) {
2301 DRM_ERROR("buffer prim %d\n", elts.prim);
2351 prim.start = elts.start;
2352 prim.finish = elts.end;
2353 prim.prim = elts.prim;
2354 prim.offset = 0; /* offset from start of dma buffers */
2355 prim.numverts = RADEON_MAX_VB_VERTS; /* duh */
2356 prim.vc_format = dev_priv->sarea_priv->vc_format;
2358 radeon_cp_dispatch_indices(dev, buf, &prim);
2539 drm_radeon_prim_t prim;
2542 if (DRM_COPY_FROM_USER(&prim, &vertex.prim[i], sizeof(prim)))
2545 if (prim.stateidx != laststate) {
2549 &vertex.state[prim.stateidx],
2558 laststate = prim.stateidx;
2561 tclprim.start = prim.start;
2562 tclprim.finish = prim.finish;
2563 tclprim.prim = prim.prim;
2564 tclprim.vc_format = prim.vc_format;
2566 if (prim.prim & RADEON_PRIM_WALK_IND) {
2567 tclprim.offset = prim.numverts * 64;
2572 tclprim.numverts = prim.numverts;