Lines Matching refs:ch_ctrl
932 cyz_handle_rx(struct cyclades_port *info, struct CH_CTRL __iomem *ch_ctrl,
1023 cyz_handle_tx(struct cyclades_port *info, struct CH_CTRL __iomem *ch_ctrl,
1109 static struct CH_CTRL __iomem *ch_ctrl;
1132 ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]);
1156 readl(&ch_ctrl->rs_status)) &
1191 cyz_handle_rx(info, ch_ctrl, buf_ctrl);
1201 cyz_handle_tx(info, ch_ctrl, buf_ctrl);
1270 static struct CH_CTRL *ch_ctrl;
1300 ch_ctrl = &(zfw_ctrl->ch_ctrl[port]);
1304 cyz_handle_rx(info, ch_ctrl, buf_ctrl);
1305 cyz_handle_tx(info, ch_ctrl, buf_ctrl);
1414 struct CH_CTRL __iomem *ch_ctrl;
1427 ch_ctrl = zfw_ctrl->ch_ctrl;
1435 cy_writel(&ch_ctrl[channel].op_mode, C_CH_ENABLE);
1438 cy_writel(&ch_ctrl[channel].intr_enable,
1442 cy_writel(&ch_ctrl[channel].intr_enable,
1447 cy_writel(&ch_ctrl[channel].intr_enable,
1451 cy_writel(&ch_ctrl[channel].intr_enable, C_IN_MDCD);
1470 cy_writel(&ch_ctrl[channel].rs_control,
1471 readl(&ch_ctrl[channel].rs_control) | C_RS_RTS |
1609 struct CH_CTRL __iomem *ch_ctrl;
1626 ch_ctrl = zfw_ctrl->ch_ctrl;
1638 cy_writel(&ch_ctrl[channel].rs_control,
1639 (__u32)(readl(&ch_ctrl[channel].rs_control) &
1786 struct CH_CTRL __iomem *ch_ctrl;
1799 ch_ctrl = zfw_ctrl->ch_ctrl;
1803 cy_writel(&ch_ctrl[channel].rs_control,
1804 readl(&ch_ctrl[channel].rs_control) |
1827 (readl(&ch_ctrl[channel].rs_status) &
2166 struct CH_CTRL __iomem *ch_ctrl = zfw_ctrl->ch_ctrl;
2170 if (readl(&ch_ctrl[channel].flow_status) != C_FS_TXIDLE) {
2374 static struct CH_CTRL *ch_ctrl;
2382 ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]);
2697 struct CH_CTRL __iomem *ch_ctrl;
2710 ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]);
2724 cy_writel(&ch_ctrl->comm_baud, baud);
2745 cy_writel(&ch_ctrl->comm_data_l, C_DL_CS5);
2748 cy_writel(&ch_ctrl->comm_data_l, C_DL_CS6);
2751 cy_writel(&ch_ctrl->comm_data_l, C_DL_CS7);
2754 cy_writel(&ch_ctrl->comm_data_l, C_DL_CS8);
2758 cy_writel(&ch_ctrl->comm_data_l,
2759 readl(&ch_ctrl->comm_data_l) | C_DL_2STOP);
2761 cy_writel(&ch_ctrl->comm_data_l,
2762 readl(&ch_ctrl->comm_data_l) | C_DL_1STOP);
2766 cy_writel(&ch_ctrl->comm_parity, C_PR_ODD);
2768 cy_writel(&ch_ctrl->comm_parity, C_PR_EVEN);
2771 cy_writel(&ch_ctrl->comm_parity, C_PR_NONE);
2776 cy_writel(&ch_ctrl->hw_flow,
2777 readl(&ch_ctrl->hw_flow) | C_RS_CTS | C_RS_RTS);
2779 cy_writel(&ch_ctrl->hw_flow, readl(&ch_ctrl->hw_flow) &
2793 cy_writel(&ch_ctrl->sw_flow, sw_flow);
2809 cy_writel(&ch_ctrl->rs_control,
2810 readl(&ch_ctrl->rs_control) & ~C_RS_DTR);
2815 cy_writel(&ch_ctrl->rs_control,
2816 readl(&ch_ctrl->rs_control) | C_RS_DTR);
2956 struct CH_CTRL __iomem *ch_ctrl;
2993 ch_ctrl = zfw_ctrl->ch_ctrl;
2994 lstatus = readl(&ch_ctrl[channel].rs_status);
3022 struct CH_CTRL __iomem *ch_ctrl;
3109 ch_ctrl = zfw_ctrl->ch_ctrl;
3113 cy_writel(&ch_ctrl[channel].rs_control,
3114 readl(&ch_ctrl[channel].rs_control) |
3120 cy_writel(&ch_ctrl[channel].rs_control,
3121 readl(&ch_ctrl[channel].rs_control) &
3127 cy_writel(&ch_ctrl[channel].rs_control,
3128 readl(&ch_ctrl[channel].rs_control) |
3138 cy_writel(&ch_ctrl[channel].rs_control,
3139 readl(&ch_ctrl[channel].rs_control) &