Lines Matching refs:card
166 waitfor_idle(struct idt77252_dev *card)
176 read_sram(struct idt77252_dev *card, unsigned long addr)
181 spin_lock_irqsave(&card->cmd_lock, flags);
183 waitfor_idle(card);
185 spin_unlock_irqrestore(&card->cmd_lock, flags);
190 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
195 (((addr > card->tst[0] + card->tst_size - 2) &&
196 (addr < card->tst[0] + card->tst_size)) ||
197 ((addr > card->tst[1] + card->tst_size - 2) &&
198 (addr < card->tst[1] + card->tst_size)))) {
200 card->name, addr, value);
203 spin_lock_irqsave(&card->cmd_lock, flags);
206 waitfor_idle(card);
207 spin_unlock_irqrestore(&card->cmd_lock, flags);
213 struct idt77252_dev *card = dev;
217 if (!card) {
222 spin_lock_irqsave(&card->cmd_lock, flags);
224 waitfor_idle(card);
226 spin_unlock_irqrestore(&card->cmd_lock, flags);
233 struct idt77252_dev *card = dev;
236 if (!card) {
241 spin_lock_irqsave(&card->cmd_lock, flags);
244 waitfor_idle(card);
245 spin_unlock_irqrestore(&card->cmd_lock, flags);
355 idt77252_read_gp(struct idt77252_dev *card)
364 idt77252_write_gp(struct idt77252_dev *card, u32 value)
369 spin_lock_irqsave(&card->cmd_lock, flags);
370 waitfor_idle(card);
372 spin_unlock_irqrestore(&card->cmd_lock, flags);
376 idt77252_eeprom_read_status(struct idt77252_dev *card)
382 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
385 idt77252_write_gp(card, gp | rdsrtab[i]);
388 idt77252_write_gp(card, gp | SAR_GP_EECS);
395 idt77252_write_gp(card, gp | clktab[j++]);
398 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
400 idt77252_write_gp(card, gp | clktab[j++]);
403 idt77252_write_gp(card, gp | SAR_GP_EECS);
410 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
416 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
419 idt77252_write_gp(card, gp | rdtab[i]);
422 idt77252_write_gp(card, gp | SAR_GP_EECS);
426 idt77252_write_gp(card, gp | clktab[j++] |
430 idt77252_write_gp(card, gp | clktab[j++] |
436 idt77252_write_gp(card, gp | SAR_GP_EECS);
443 idt77252_write_gp(card, gp | clktab[j++]);
446 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
448 idt77252_write_gp(card, gp | clktab[j++]);
451 idt77252_write_gp(card, gp | SAR_GP_EECS);
458 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
463 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
466 idt77252_write_gp(card, gp | wrentab[i]);
469 idt77252_write_gp(card, gp | SAR_GP_EECS);
473 idt77252_write_gp(card, gp | wrtab[i]);
476 idt77252_write_gp(card, gp | SAR_GP_EECS);
480 idt77252_write_gp(card, gp | clktab[j++] |
484 idt77252_write_gp(card, gp | clktab[j++] |
490 idt77252_write_gp(card, gp | SAR_GP_EECS);
494 idt77252_write_gp(card, gp | clktab[j++] |
498 idt77252_write_gp(card, gp | clktab[j++] |
504 idt77252_write_gp(card, gp | SAR_GP_EECS);
509 idt77252_eeprom_init(struct idt77252_dev *card)
513 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
515 idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
517 idt77252_write_gp(card, gp | SAR_GP_EECS);
519 idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
521 idt77252_write_gp(card, gp | SAR_GP_EECS);
529 dump_tct(struct idt77252_dev *card, int index)
534 tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
536 printk("%s: TCT %x:", card->name, index);
538 printk(" %08x", read_sram(card, tct + i));
544 idt77252_tx_dump(struct idt77252_dev *card)
551 for (i = 0; i < card->tct_size; i++) {
552 vc = card->vcs[i];
565 printk("%s: Connection %d:\n", card->name, vc->index);
566 dump_tct(card, vc->index);
579 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
581 struct sb_pool *pool = &card->sbpool[queue];
599 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
614 card->sbpool[queue].skb[index] = NULL;
618 sb_pool_skb(struct idt77252_dev *card, u32 handle)
630 return card->sbpool[queue].skb[index];
634 alloc_scq(struct idt77252_dev *card, int class)
641 scq->base = pci_alloc_consistent(card->pcidev, SCQ_SIZE,
666 free_scq(struct idt77252_dev *card, struct scq_info *scq)
671 pci_free_consistent(card->pcidev, SCQ_SIZE,
675 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
686 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
701 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
708 TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
754 write_sram(card, scq->scd,
769 card->name, atomic_read(&scq->used),
770 read_sram(card, scq->scd + 1), scq->next);
777 card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
779 idt77252_tx_dump(card);
789 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
796 card->name, atomic_read(&scq->used), scq->next);
800 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
802 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
819 if (push_on_scq(card, vc, skb)) {
828 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
838 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
843 card->name, skb->len);
848 IDT77252_PRV_PADDR(skb) = pci_map_single(card->pcidev, skb->data,
864 vc = card->vcs[0];
870 printk("%s: Trying to transmit on reserved VC\n", card->name);
906 printk("%s: Traffic type not supported.\n", card->name);
916 if (push_on_scq(card, vc, skb)) {
926 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
932 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
936 for (i = 0; i < card->scd_size; i++) {
937 if (!card->scd2vc[i]) {
938 card->scd2vc[i] = vc;
940 return card->scd_base + i * SAR_SRAM_SCD_SIZE;
947 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
949 write_sram(card, scq->scd, scq->paddr);
950 write_sram(card, scq->scd + 1, 0x00000000);
951 write_sram(card, scq->scd + 2, 0xffffffff);
952 write_sram(card, scq->scd + 3, 0x00000000);
956 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
968 init_rsq(struct idt77252_dev *card)
972 card->rsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
973 &card->rsq.paddr);
974 if (card->rsq.base == NULL) {
975 printk("%s: can't allocate RSQ.\n", card->name);
978 memset(card->rsq.base, 0, RSQSIZE);
980 card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
981 card->rsq.next = card->rsq.last;
982 for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
985 writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
987 writel(card->rsq.paddr, SAR_REG_RSQB);
989 IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
990 (unsigned long) card->rsq.base,
993 card->name,
1002 deinit_rsq(struct idt77252_dev *card)
1004 pci_free_consistent(card->pcidev, RSQSIZE,
1005 card->rsq.base, card->rsq.paddr);
1009 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1023 card->name);
1027 skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1030 card->name, __FUNCTION__,
1041 card->name, vpi, vci, skb, skb->data);
1043 if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1045 card->name, vpi, vci);
1046 recycle_rx_skb(card, skb);
1050 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1053 card->name, vpi, vci);
1054 recycle_rx_skb(card, skb);
1060 pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(skb),
1074 card->name);
1080 card->name);
1103 recycle_rx_skb(card, skb);
1108 card->name, vcc->qos.aal);
1109 recycle_rx_skb(card, skb);
1131 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1136 card->name, len, rpp->len, readl(SAR_REG_CDC));
1137 recycle_rx_pool_skb(card, rpp);
1142 RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1143 recycle_rx_pool_skb(card, rpp);
1153 card->name);
1154 recycle_rx_pool_skb(card, rpp);
1159 recycle_rx_pool_skb(card, rpp);
1170 recycle_rx_pool_skb(card, rpp);
1183 flush_rx_pool(card, rpp);
1186 recycle_rx_skb(card, skb);
1190 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1193 sb_pool_remove(card, skb);
1203 add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1205 add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1207 add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1209 add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1215 idt77252_rx(struct idt77252_dev *card)
1219 if (card->rsq.next == card->rsq.last)
1220 rsqe = card->rsq.base;
1222 rsqe = card->rsq.next + 1;
1225 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1230 dequeue_rx(card, rsqe);
1232 card->rsq.next = rsqe;
1233 if (card->rsq.next == card->rsq.last)
1234 rsqe = card->rsq.base;
1236 rsqe = card->rsq.next + 1;
1239 writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1244 idt77252_rx_raw(struct idt77252_dev *card)
1252 if (card->raw_cell_head == NULL) {
1253 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1254 card->raw_cell_head = sb_pool_skb(card, handle);
1257 queue = card->raw_cell_head;
1264 pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(queue),
1283 card->name, (header >> 28) & 0x000f,
1294 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1296 card->name, vpi, vci);
1300 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1303 card->name, vpi, vci);
1311 card->name, vpi, vci);
1318 card->name);
1325 card->name);
1353 next = sb_pool_skb(card, handle);
1354 recycle_rx_skb(card, queue);
1357 card->raw_cell_head = next;
1358 queue = card->raw_cell_head;
1359 pci_dma_sync_single_for_cpu(card->pcidev,
1365 card->raw_cell_head = NULL;
1367 card->name);
1382 init_tsq(struct idt77252_dev *card)
1386 card->tsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
1387 &card->tsq.paddr);
1388 if (card->tsq.base == NULL) {
1389 printk("%s: can't allocate TSQ.\n", card->name);
1392 memset(card->tsq.base, 0, TSQSIZE);
1394 card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1395 card->tsq.next = card->tsq.last;
1396 for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1399 writel(card->tsq.paddr, SAR_REG_TSQB);
1400 writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1407 deinit_tsq(struct idt77252_dev *card)
1409 pci_free_consistent(card->pcidev, TSQSIZE,
1410 card->tsq.base, card->tsq.paddr);
1414 idt77252_tx(struct idt77252_dev *card)
1421 if (card->tsq.next == card->tsq.last)
1422 tsqe = card->tsq.base;
1424 tsqe = card->tsq.next + 1;
1427 card->tsq.base, card->tsq.next, card->tsq.last);
1445 TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1455 card->name,
1461 vc = card->vcs[conn & 0x1fff];
1464 card->name, conn & 0x1fff);
1469 card->name, vc->index);
1478 vc = card->vcs[conn & 0x1fff];
1481 card->name,
1486 drain_scq(card, vc);
1496 if (vpi >= (1 << card->vpibits) ||
1497 vci >= (1 << card->vcibits)) {
1500 card->name, vpi, vci);
1504 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1508 card->name, vpi, vci);
1512 drain_scq(card, vc);
1518 card->tsq.next = tsqe;
1519 if (card->tsq.next == card->tsq.last)
1520 tsqe = card->tsq.base;
1522 tsqe = card->tsq.next + 1;
1525 card->tsq.base, card->tsq.next, card->tsq.last);
1531 writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1535 card->index, readl(SAR_REG_TSQH),
1536 readl(SAR_REG_TSQT), card->tsq.next);
1543 struct idt77252_dev *card = (struct idt77252_dev *)data;
1549 spin_lock_irqsave(&card->tst_lock, flags);
1551 base = card->tst[card->tst_index];
1552 idle = card->tst[card->tst_index ^ 1];
1554 if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1555 jump = base + card->tst_size - 2;
1558 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1559 mod_timer(&card->tst_timer, jiffies + 1);
1563 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1565 card->tst_index ^= 1;
1566 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1568 base = card->tst[card->tst_index];
1569 idle = card->tst[card->tst_index ^ 1];
1571 for (e = 0; e < card->tst_size - 2; e++) {
1572 if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1573 write_sram(card, idle + e,
1574 card->soft_tst[e].tste & TSTE_MASK);
1575 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1580 if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1582 for (e = 0; e < card->tst_size - 2; e++) {
1583 if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1584 write_sram(card, idle + e,
1585 card->soft_tst[e].tste & TSTE_MASK);
1586 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1587 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1591 jump = base + card->tst_size - 2;
1593 write_sram(card, jump, TSTE_OPC_NULL);
1594 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1596 mod_timer(&card->tst_timer, jiffies + 1);
1600 spin_unlock_irqrestore(&card->tst_lock, flags);
1604 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1612 avail = card->tst_size - 2;
1614 if (card->soft_tst[e].vc == NULL)
1618 printk("%s: No free TST entries found\n", card->name);
1623 card->name, vc ? vc->index : -1, e);
1631 idle = card->tst[card->tst_index ^ 1];
1637 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1639 card->soft_tst[e].vc = vc;
1641 card->soft_tst[e].vc = (void *)-1;
1643 card->soft_tst[e].tste = data;
1644 if (timer_pending(&card->tst_timer))
1645 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1647 write_sram(card, idle + e, data);
1648 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1651 cl -= card->tst_size;
1664 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1669 spin_lock_irqsave(&card->tst_lock, flags);
1671 res = __fill_tst(card, vc, n, opc);
1673 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1674 if (!timer_pending(&card->tst_timer))
1675 mod_timer(&card->tst_timer, jiffies + 1);
1677 spin_unlock_irqrestore(&card->tst_lock, flags);
1682 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1687 idle = card->tst[card->tst_index ^ 1];
1689 for (e = 0; e < card->tst_size - 2; e++) {
1690 if (card->soft_tst[e].vc == vc) {
1691 card->soft_tst[e].vc = NULL;
1693 card->soft_tst[e].tste = TSTE_OPC_VAR;
1694 if (timer_pending(&card->tst_timer))
1695 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1697 write_sram(card, idle + e, TSTE_OPC_VAR);
1698 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1707 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1712 spin_lock_irqsave(&card->tst_lock, flags);
1714 res = __clear_tst(card, vc);
1716 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1717 if (!timer_pending(&card->tst_timer))
1718 mod_timer(&card->tst_timer, jiffies + 1);
1720 spin_unlock_irqrestore(&card->tst_lock, flags);
1725 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1731 spin_lock_irqsave(&card->tst_lock, flags);
1733 __clear_tst(card, vc);
1734 res = __fill_tst(card, vc, n, opc);
1736 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1737 if (!timer_pending(&card->tst_timer))
1738 mod_timer(&card->tst_timer, jiffies + 1);
1740 spin_unlock_irqrestore(&card->tst_lock, flags);
1746 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1750 tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1755 card->name, tct, vc->scq->scd);
1757 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1758 write_sram(card, tct + 1, 0);
1759 write_sram(card, tct + 2, 0);
1760 write_sram(card, tct + 3, 0);
1761 write_sram(card, tct + 4, 0);
1762 write_sram(card, tct + 5, 0);
1763 write_sram(card, tct + 6, 0);
1764 write_sram(card, tct + 7, 0);
1769 card->name, tct, vc->scq->scd);
1771 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1772 write_sram(card, tct + 1, 0);
1773 write_sram(card, tct + 2, TCT_TSIF);
1774 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1775 write_sram(card, tct + 4, 0);
1776 write_sram(card, tct + 5, vc->init_er);
1777 write_sram(card, tct + 6, 0);
1778 write_sram(card, tct + 7, TCT_FLAG_UBR);
1797 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1803 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1809 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1838 if (idt77252_fbq_full(card, queue))
1846 spin_lock_irqsave(&card->cmd_lock, flags);
1847 writel(handle, card->fbq[queue]);
1848 writel(addr, card->fbq[queue]);
1849 spin_unlock_irqrestore(&card->cmd_lock, flags);
1855 add_rx_skb(struct idt77252_dev *card, int queue,
1867 if (sb_pool_add(card, skb, queue)) {
1872 paddr = pci_map_single(card->pcidev, skb->data,
1877 if (push_rx_skb(card, skb, queue)) {
1886 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1890 card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1898 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1903 pci_dma_sync_single_for_device(card->pcidev, IDT77252_PRV_PADDR(skb),
1907 err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1909 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1912 sb_pool_remove(card, skb);
1918 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1927 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1936 recycle_rx_skb(card, skb);
1939 flush_rx_pool(card, rpp);
1964 struct idt77252_dev *card = dev->dev_data;
1969 printk("%s: NULL connection in send().\n", card->name);
1975 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1987 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1994 printk("%s: No scatter-gather yet.\n", card->name);
2001 err = queue_skb(card, vc, skb, oam);
2021 struct idt77252_dev *card = dev->dev_data;
2026 printk("%s: Out of memory in send_oam().\n", card->name);
2083 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2097 struct idt77252_dev *card = vc->card;
2120 lacr = idt77252_rate_logindex(card, cps);
2161 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2171 card->name);
2176 tst_free = card->tst_free;
2184 TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2186 tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2187 modl = tmpl % (unsigned long)card->utopia_pcr;
2189 tst_entries = (int) (tmpl / card->utopia_pcr);
2196 printk("%s: no CBR bandwidth free.\n", card->name);
2203 card->name);
2208 printk("%s: not enough CBR bandwidth free.\n", card->name);
2214 card->tst_free = tst_free - tst_entries;
2220 card->name, tst_used, tst_entries);
2221 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2225 OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2226 fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2231 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2247 tcr = card->link_pcr;
2252 vc->init_er = idt77252_rate_logindex(card, tcr);
2263 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2286 vc->scq = alloc_scq(card, vc->class);
2288 printk("%s: can't get SCQ.\n", card->name);
2292 vc->scq->scd = get_free_scd(card, vc);
2294 printk("%s: no SCD available.\n", card->name);
2295 free_scq(card, vc->scq);
2299 fill_scd(card, vc->scq, vc->class);
2301 if (set_tct(card, vc)) {
2303 card->name, qos->txtp.traffic_class);
2305 card->scd2vc[vc->scd_index] = NULL;
2306 free_scq(card, vc->scq);
2312 error = idt77252_init_cbr(card, vc, vcc, qos);
2314 card->scd2vc[vc->scd_index] = NULL;
2315 free_scq(card, vc->scq);
2324 error = idt77252_init_ubr(card, vc, vcc, qos);
2326 card->scd2vc[vc->scd_index] = NULL;
2327 free_scq(card, vc->scq);
2341 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2357 flush_rx_pool(card, &vc->rcv.rx_pool);
2391 addr = card->rct_base + (vc->index << 2);
2393 OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2394 write_sram(card, addr, rcte);
2396 spin_lock_irqsave(&card->cmd_lock, flags);
2398 waitfor_idle(card);
2399 spin_unlock_irqrestore(&card->cmd_lock, flags);
2408 struct idt77252_dev *card = dev->dev_data;
2419 if (vpi >= (1 << card->vpibits)) {
2420 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2424 if (vci >= (1 << card->vcibits)) {
2425 printk("%s: unsupported VCI: %d\n", card->name, vci);
2431 mutex_lock(&card->mutex);
2433 OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2441 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2442 mutex_unlock(&card->mutex);
2446 index = VPCI2VC(card, vpi, vci);
2447 if (!card->vcs[index]) {
2448 card->vcs[index] = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2449 if (!card->vcs[index]) {
2450 printk("%s: can't alloc vc in open()\n", card->name);
2451 mutex_unlock(&card->mutex);
2454 card->vcs[index]->card = card;
2455 card->vcs[index]->index = index;
2457 spin_lock_init(&card->vcs[index]->lock);
2459 vc = card->vcs[index];
2464 card->name, vc->index, vcc->vpi, vcc->vci,
2478 printk("%s: %s vci already in use.\n", card->name,
2480 mutex_unlock(&card->mutex);
2485 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2487 mutex_unlock(&card->mutex);
2493 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2495 mutex_unlock(&card->mutex);
2502 mutex_unlock(&card->mutex);
2510 struct idt77252_dev *card = dev->dev_data;
2516 mutex_lock(&card->mutex);
2519 card->name, vc->index, vcc->vpi, vcc->vci);
2533 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2535 spin_lock_irqsave(&card->cmd_lock, flags);
2537 waitfor_idle(card);
2538 spin_unlock_irqrestore(&card->cmd_lock, flags);
2542 card->name);
2544 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2572 card->name, atomic_read(&vc->scq->used));
2575 clear_scd(card, vc->scq, vc->class);
2578 clear_tst(card, vc);
2579 card->tst_free += vc->ntste;
2583 card->scd2vc[vc->scd_index] = NULL;
2584 free_scq(card, vc->scq);
2587 mutex_unlock(&card->mutex);
2594 struct idt77252_dev *card = dev->dev_data;
2598 mutex_lock(&card->mutex);
2602 error = idt77252_init_tx(card, vc, vcc, qos);
2608 error = idt77252_init_cbr(card, vc, vcc, qos);
2614 error = idt77252_init_ubr(card, vc, vcc, qos);
2634 error = idt77252_init_rx(card, vc, vcc, qos);
2644 mutex_unlock(&card->mutex);
2651 struct idt77252_dev *card = dev->dev_data;
2658 return sprintf(page, "TSIF: %lu\n", card->irqstat[15]);
2660 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2662 return sprintf(page, "TSQF: %lu\n", card->irqstat[12]);
2664 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2666 return sprintf(page, "PHYI: %lu\n", card->irqstat[10]);
2668 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2670 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2672 return sprintf(page, "RSQF: %lu\n", card->irqstat[6]);
2674 return sprintf(page, "EPDU: %lu\n", card->irqstat[5]);
2676 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2678 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2680 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2682 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2686 for (i = 0; i < card->tct_size; i++) {
2692 vc = card->vcs[i];
2706 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2709 p += sprintf(p, " %08x", read_sram(card, tct + i));
2723 idt77252_collect_stat(struct idt77252_dev *card)
2732 printk("%s:", card->name);
2777 struct idt77252_dev *card = dev_id;
2784 if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2785 printk("%s: Re-entering irq_handler()\n", card->name);
2792 INTPRINTK("%s: TSIF\n", card->name);
2793 card->irqstat[15]++;
2794 idt77252_tx(card);
2797 INTPRINTK("%s: TXICP\n", card->name);
2798 card->irqstat[14]++;
2800 idt77252_tx_dump(card);
2804 INTPRINTK("%s: TSQF\n", card->name);
2805 card->irqstat[12]++;
2806 idt77252_tx(card);
2809 INTPRINTK("%s: TMROF\n", card->name);
2810 card->irqstat[11]++;
2811 idt77252_collect_stat(card);
2815 INTPRINTK("%s: EPDU\n", card->name);
2816 card->irqstat[5]++;
2817 idt77252_rx(card);
2820 INTPRINTK("%s: RSQAF\n", card->name);
2821 card->irqstat[1]++;
2822 idt77252_rx(card);
2825 INTPRINTK("%s: RSQF\n", card->name);
2826 card->irqstat[6]++;
2827 idt77252_rx(card);
2830 INTPRINTK("%s: RAWCF\n", card->name);
2831 card->irqstat[4]++;
2832 idt77252_rx_raw(card);
2836 INTPRINTK("%s: PHYI", card->name);
2837 card->irqstat[10]++;
2838 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2839 card->atmdev->phy->interrupt(card->atmdev);
2847 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2850 card->irqstat[2]++;
2852 card->irqstat[3]++;
2854 card->irqstat[7]++;
2856 card->irqstat[8]++;
2858 schedule_work(&card->tqueue);
2862 clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2869 struct idt77252_dev *card =
2878 add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2884 add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2890 add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2896 add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2909 open_card_oam(struct idt77252_dev *card)
2918 for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2920 index = VPCI2VC(card, vpi, vci);
2924 printk("%s: can't alloc vc\n", card->name);
2928 card->vcs[index] = vc;
2930 flush_rx_pool(card, &vc->rcv.rx_pool);
2937 addr = card->rct_base + (vc->index << 2);
2938 write_sram(card, addr, rcte);
2940 spin_lock_irqsave(&card->cmd_lock, flags);
2943 waitfor_idle(card);
2944 spin_unlock_irqrestore(&card->cmd_lock, flags);
2952 close_card_oam(struct idt77252_dev *card)
2960 for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2962 index = VPCI2VC(card, vpi, vci);
2963 vc = card->vcs[index];
2965 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2967 spin_lock_irqsave(&card->cmd_lock, flags);
2970 waitfor_idle(card);
2971 spin_unlock_irqrestore(&card->cmd_lock, flags);
2976 card->name);
2978 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2985 open_card_ubr0(struct idt77252_dev *card)
2991 printk("%s: can't alloc vc\n", card->name);
2994 card->vcs[0] = vc;
2997 vc->scq = alloc_scq(card, vc->class);
2999 printk("%s: can't get SCQ.\n", card->name);
3003 card->scd2vc[0] = vc;
3005 vc->scq->scd = card->scd_base;
3007 fill_scd(card, vc->scq, vc->class);
3009 write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
3010 write_sram(card, card->tct_base + 1, 0);
3011 write_sram(card, card->tct_base + 2, 0);
3012 write_sram(card, card->tct_base + 3, 0);
3013 write_sram(card, card->tct_base + 4, 0);
3014 write_sram(card, card->tct_base + 5, 0);
3015 write_sram(card, card->tct_base + 6, 0);
3016 write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
3024 idt77252_dev_open(struct idt77252_dev *card)
3028 if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3029 printk("%s: SAR not yet initialized.\n", card->name);
3053 if (open_card_oam(card)) {
3054 printk("%s: Error initializing OAM.\n", card->name);
3058 if (open_card_ubr0(card)) {
3059 printk("%s: Error initializing UBR0.\n", card->name);
3063 IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3070 struct idt77252_dev *card = dev->dev_data;
3073 close_card_oam(card);
3089 DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3101 deinit_card(struct idt77252_dev *card)
3106 if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3107 printk("%s: SAR not yet initialized.\n", card->name);
3110 DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3114 if (card->atmdev)
3115 atm_dev_deregister(card->atmdev);
3119 skb = card->sbpool[i].skb[j];
3121 pci_unmap_single(card->pcidev,
3126 card->sbpool[i].skb[j] = NULL;
3132 vfree(card->soft_tst);
3134 vfree(card->scd2vc);
3136 vfree(card->vcs);
3138 if (card->raw_cell_hnd) {
3139 pci_free_consistent(card->pcidev, 2 * sizeof(u32),
3140 card->raw_cell_hnd, card->raw_cell_paddr);
3143 if (card->rsq.base) {
3144 DIPRINTK("%s: Release RSQ ...\n", card->name);
3145 deinit_rsq(card);
3148 if (card->tsq.base) {
3149 DIPRINTK("%s: Release TSQ ...\n", card->name);
3150 deinit_tsq(card);
3154 free_irq(card->pcidev->irq, card);
3157 if (card->fbq[i])
3158 iounmap(card->fbq[i]);
3161 if (card->membase)
3162 iounmap(card->membase);
3164 clear_bit(IDT77252_BIT_INIT, &card->flags);
3165 DIPRINTK("%s: Card deinitialized.\n", card->name);
3170 init_sram(struct idt77252_dev *card)
3174 for (i = 0; i < card->sramsize; i += 4)
3175 write_sram(card, (i >> 2), 0);
3177 /* set SRAM layout for THIS card */
3178 if (card->sramsize == (512 * 1024)) {
3179 card->tct_base = SAR_SRAM_TCT_128_BASE;
3180 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3182 card->rct_base = SAR_SRAM_RCT_128_BASE;
3183 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3185 card->rt_base = SAR_SRAM_RT_128_BASE;
3186 card->scd_base = SAR_SRAM_SCD_128_BASE;
3187 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3189 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3190 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3191 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3192 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3193 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3194 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3195 card->fifo_size = SAR_RXFD_SIZE_32K;
3197 card->tct_base = SAR_SRAM_TCT_32_BASE;
3198 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3200 card->rct_base = SAR_SRAM_RCT_32_BASE;
3201 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3203 card->rt_base = SAR_SRAM_RT_32_BASE;
3204 card->scd_base = SAR_SRAM_SCD_32_BASE;
3205 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3207 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3208 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3209 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3210 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3211 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3212 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3213 card->fifo_size = SAR_RXFD_SIZE_4K;
3217 for (i = 0; i < card->tct_size; i++) {
3218 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3219 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3220 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3221 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3222 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3223 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3224 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3225 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3229 for (i = 0; i < card->rct_size; i++) {
3230 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3232 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3234 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3236 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3251 write_sram(card, card->rt_base + i, log_to_rate[i]);
3261 write_sram(card, card->rt_base + 256 + i, tmp);
3265 IPRINTK("%s: initialize rate table ...\n", card->name);
3266 writel(card->rt_base << 2, SAR_REG_RTBL);
3269 IPRINTK("%s: initialize TST ...\n", card->name);
3270 card->tst_free = card->tst_size - 2; /* last two are jumps */
3272 for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3273 write_sram(card, i, TSTE_OPC_VAR);
3274 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3276 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3278 for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3279 write_sram(card, i, TSTE_OPC_VAR);
3280 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3282 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3285 card->tst_index = 0;
3286 writel(card->tst[0] << 2, SAR_REG_TSTB);
3289 IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3290 writel(card->abrst_size | (card->abrst_base << 2),
3293 IPRINTK("%s: initialize receive fifo ...\n", card->name);
3294 writel(card->fifo_size | (card->fifo_base << 2),
3297 IPRINTK("%s: SRAM initialization complete.\n", card->name);
3304 struct idt77252_dev *card = dev->dev_data;
3305 struct pci_dev *pcidev = card->pcidev;
3317 if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3327 IPRINTK("%s: Checking PCI retries.\n", card->name);
3329 printk("%s: can't read PCI retry timeout.\n", card->name);
3330 deinit_card(card);
3335 card->name, pci_byte);
3338 card->name);
3339 deinit_card(card);
3343 IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3345 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3346 deinit_card(card);
3351 card->name, pci_byte);
3353 printk("%s: can't set PCI TRDY timeout.\n", card->name);
3354 deinit_card(card);
3360 printk("%s: resetting timer overflow.\n", card->name);
3363 IPRINTK("%s: Request IRQ ... ", card->name);
3365 card->name, card) != 0) {
3366 printk("%s: can't allocate IRQ.\n", card->name);
3367 deinit_card(card);
3376 IPRINTK("%s: Initializing SRAM\n", card->name);
3387 if (card->sramsize == (512 * 1024))
3410 if (init_sram(card) < 0)
3417 if (0 != init_tsq(card)) {
3418 deinit_card(card);
3422 if (0 != init_rsq(card)) {
3423 deinit_card(card);
3427 card->vpibits = vpibits;
3428 if (card->sramsize == (512 * 1024)) {
3429 card->vcibits = 10 - card->vpibits;
3431 card->vcibits = 9 - card->vpibits;
3434 card->vcimask = 0;
3435 for (k = 0, i = 1; k < card->vcibits; k++) {
3436 card->vcimask |= i;
3440 IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3447 card->raw_cell_hnd = pci_alloc_consistent(card->pcidev, 2 * sizeof(u32),
3448 &card->raw_cell_paddr);
3449 if (!card->raw_cell_hnd) {
3450 printk("%s: memory allocation failure.\n", card->name);
3451 deinit_card(card);
3454 memset(card->raw_cell_hnd, 0, 2 * sizeof(u32));
3455 writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3456 IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3457 card->raw_cell_hnd);
3459 size = sizeof(struct vc_map *) * card->tct_size;
3460 IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3461 if (NULL == (card->vcs = vmalloc(size))) {
3462 printk("%s: memory allocation failure.\n", card->name);
3463 deinit_card(card);
3466 memset(card->vcs, 0, size);
3468 size = sizeof(struct vc_map *) * card->scd_size;
3470 card->name, size);
3471 if (NULL == (card->scd2vc = vmalloc(size))) {
3472 printk("%s: memory allocation failure.\n", card->name);
3473 deinit_card(card);
3476 memset(card->scd2vc, 0, size);
3478 size = sizeof(struct tst_info) * (card->tst_size - 2);
3480 card->name, size);
3481 if (NULL == (card->soft_tst = vmalloc(size))) {
3482 printk("%s: memory allocation failure.\n", card->name);
3483 deinit_card(card);
3486 for (i = 0; i < card->tst_size - 2; i++) {
3487 card->soft_tst[i].tste = TSTE_OPC_VAR;
3488 card->soft_tst[i].vc = NULL;
3492 printk("%s: No LT device defined.\n", card->name);
3493 deinit_card(card);
3497 printk("%s: LT had no IOCTL funtion defined.\n", card->name);
3498 deinit_card(card);
3515 card->link_pcr = (linkrate / 8 / 53);
3517 card->name, linkrate, card->link_pcr);
3520 card->utopia_pcr = card->link_pcr;
3522 card->utopia_pcr = (160000000 / 8 / 54);
3526 if (card->utopia_pcr > card->link_pcr)
3527 rsvdcr = card->utopia_pcr - card->link_pcr;
3529 tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3530 modl = tmpl % (unsigned long)card->utopia_pcr;
3531 tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3534 card->tst_free -= tst_entries;
3535 fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3538 idt77252_eeprom_init(card);
3539 printk("%s: EEPROM: %02x:", card->name,
3540 idt77252_eeprom_read_status(card));
3544 idt77252_eeprom_read_byte(card, i)
3550 sprintf(tname, "eth%d", card->index);
3553 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3556 card->name, card->atmdev->esi[0], card->atmdev->esi[1],
3557 card->atmdev->esi[2], card->atmdev->esi[3],
3558 card->atmdev->esi[4], card->atmdev->esi[5]);
3564 set_bit(IDT77252_BIT_INIT, &card->flags);
3566 XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3579 idt77252_preset(struct idt77252_dev *card)
3588 card->name);
3589 if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3590 printk("%s: can't read PCI_COMMAND.\n", card->name);
3591 deinit_card(card);
3596 card->name, pci_command);
3597 deinit_card(card);
3601 if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3602 printk("%s: can't write PCI_COMMAND.\n", card->name);
3603 deinit_card(card);
3615 IPRINTK("%s: Software resetted.\n", card->name);
3621 probe_sram(struct idt77252_dev *card)
3649 struct idt77252_dev *card;
3666 card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3667 if (!card) {
3672 card->revision = revision;
3673 card->index = index;
3674 card->pcidev = pcidev;
3675 sprintf(card->name, "idt77252-%d", card->index);
3677 INIT_WORK(&card->tqueue, idt77252_softint);
3682 mutex_init(&card->mutex);
3683 spin_lock_init(&card->cmd_lock);
3684 spin_lock_init(&card->tst_lock);
3686 init_timer(&card->tst_timer);
3687 card->tst_timer.data = (unsigned long)card;
3688 card->tst_timer.function = tst_timer;
3691 card->membase = ioremap(membase, 1024);
3692 if (!card->membase) {
3693 printk("%s: can't ioremap() membase\n", card->name);
3698 if (idt77252_preset(card)) {
3699 printk("%s: preset failed\n", card->name);
3706 printk("%s: can't register atm device\n", card->name);
3710 dev->dev_data = card;
3711 card->atmdev = dev;
3716 printk("%s: can't init SUNI\n", card->name);
3722 card->sramsize = probe_sram(card);
3725 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3726 if (!card->fbq[i]) {
3727 printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3734 card->name, ((revision > 1) && (revision < 25)) ?
3736 card->sramsize / 1024);
3739 printk("%s: init_card failed\n", card->name);
3744 dev->ci_range.vpi_bits = card->vpibits;
3745 dev->ci_range.vci_bits = card->vcibits;
3746 dev->link_rate = card->link_pcr;
3751 if (idt77252_dev_open(card)) {
3752 printk("%s: dev_open failed\n", card->name);
3757 *last = card;
3758 last = &card->next;
3768 deinit_card(card);
3771 iounmap(card->membase);
3774 kfree(card);
3816 struct idt77252_dev *card;
3822 card = idt77252_chain;
3823 dev = card->atmdev;
3824 idt77252_chain = card->next;
3828 deinit_card(card);
3829 pci_disable_device(card->pcidev);
3830 kfree(card);