Lines Matching refs:ap
178 * @ap: Port whose timings we are configuring
187 static void scc_set_piomode (struct ata_port *ap, struct ata_device *adev)
190 void __iomem *ctrl_base = ap->host->iomap[SCC_CTRL_BAR];
211 * @ap: Port whose timings we are configuring
221 static void scc_set_dmamode (struct ata_port *ap, struct ata_device *adev)
226 void __iomem *ctrl_base = ap->host->iomap[SCC_CTRL_BAR];
263 * @ap: Port to which output is sent
269 static void scc_tf_load (struct ata_port *ap, const struct ata_taskfile *tf)
271 struct ata_ioports *ioaddr = &ap->ioaddr;
274 if (tf->ctl != ap->last_ctl) {
276 ap->last_ctl = tf->ctl;
277 ata_wait_idle(ap);
313 ata_wait_idle(ap);
318 * @ap: port where the device is
323 static u8 scc_check_status (struct ata_port *ap)
325 return in_be32(ap->ioaddr.status_addr);
330 * @ap: Port from which input is read
336 static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf)
338 struct ata_ioports *ioaddr = &ap->ioaddr;
340 tf->command = scc_check_status(ap);
360 * @ap: port to which command is being issued
366 static void scc_exec_command (struct ata_port *ap,
369 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
371 out_be32(ap->ioaddr.command_addr, tf->command);
372 ata_pause(ap);
377 * @ap: port where the device is
380 static u8 scc_check_altstatus (struct ata_port *ap)
382 return in_be32(ap->ioaddr.altstatus_addr);
387 * @ap: ATA channel to manipulate
393 static void scc_std_dev_select (struct ata_port *ap, unsigned int device)
402 out_be32(ap->ioaddr.device_addr, tmp);
403 ata_pause(ap);
415 struct ata_port *ap = qc->ap;
418 void __iomem *mmio = ap->ioaddr.bmdma_addr;
421 out_be32(mmio + SCC_DMA_TABLE_OFS, ap->prd_dma);
431 ap->ops->exec_command(ap, &qc->tf);
443 struct ata_port *ap = qc->ap;
445 void __iomem *mmio = ap->ioaddr.bmdma_addr;
454 * @ap: ATA channel to examine
460 static unsigned int scc_devchk (struct ata_port *ap,
463 struct ata_ioports *ioaddr = &ap->ioaddr;
466 ap->ops->dev_select(ap, device);
492 static int scc_bus_post_reset(struct ata_port *ap, unsigned int devmask,
495 struct ata_ioports *ioaddr = &ap->ioaddr;
504 rc = ata_wait_ready(ap, deadline);
515 ap->ops->dev_select(ap, 1);
525 rc = ata_wait_ready(ap, deadline);
531 ap->ops->dev_select(ap, 0);
533 ap->ops->dev_select(ap, 1);
535 ap->ops->dev_select(ap, 0);
546 static unsigned int scc_bus_softreset(struct ata_port *ap, unsigned int devmask,
549 struct ata_ioports *ioaddr = &ap->ioaddr;
551 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
554 out_be32(ioaddr->ctl_addr, ap->ctl);
556 out_be32(ioaddr->ctl_addr, ap->ctl | ATA_SRST);
558 out_be32(ioaddr->ctl_addr, ap->ctl);
576 if (scc_check_status(ap) == 0xFF)
579 scc_bus_post_reset(ap, devmask, deadline);
586 * @ap: port to reset
593 static int scc_std_softreset (struct ata_port *ap, unsigned int *classes,
596 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
602 if (ata_port_offline(ap)) {
608 if (scc_devchk(ap, 0))
610 if (slave_possible && scc_devchk(ap, 1))
614 ap->ops->dev_select(ap, 0);
618 err_mask = scc_bus_softreset(ap, devmask, deadline);
620 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
626 classes[0] = ata_dev_try_classify(ap, 0, &err);
628 classes[1] = ata_dev_try_classify(ap, 1, &err);
642 struct ata_port *ap = qc->ap;
643 void __iomem *ctrl_base = ap->host->iomap[SCC_CTRL_BAR];
644 void __iomem *bmid_base = ap->host->iomap[SCC_BMID_BAR];
691 scc_std_softreset(ap, &classes, deadline);
717 ata_altstatus(ap); /* dummy read */
722 * @ap: Port associated with this ATA transaction.
725 static u8 scc_bmdma_status (struct ata_port *ap)
728 void __iomem *mmio = ap->ioaddr.bmdma_addr;
734 if (ata_altstatus(ap) & ATA_ERR &&
756 struct ata_port *ap = adev->ap;
760 void __iomem *mmio = ap->ioaddr.data_addr;
788 * @ap: Port on which interrupts are enabled.
793 static u8 scc_irq_on (struct ata_port *ap)
795 struct ata_ioports *ioaddr = &ap->ioaddr;
798 ap->ctl &= ~ATA_NIEN;
799 ap->last_ctl = ap->ctl;
801 out_be32(ioaddr->ctl_addr, ap->ctl);
802 tmp = ata_wait_idle(ap);
804 ap->ops->irq_clear(ap);
811 * @ap: Port on which interrupts are enabled.
816 static u8 scc_irq_ack (struct ata_port *ap, unsigned int chk_drq)
821 status = ata_busy_wait(ap, bits, 1000);
823 if (ata_msg_err(ap))
827 host_stat = in_be32(ap->ioaddr.bmdma_addr + SCC_DMA_STATUS);
828 out_be32(ap->ioaddr.bmdma_addr + SCC_DMA_STATUS,
831 post_stat = in_be32(ap->ioaddr.bmdma_addr + SCC_DMA_STATUS);
833 if (ata_msg_intr(ap))
843 * @ap: port to freeze
848 static void scc_bmdma_freeze (struct ata_port *ap)
850 struct ata_ioports *ioaddr = &ap->ioaddr;
852 ap->ctl |= ATA_NIEN;
853 ap->last_ctl = ap->ctl;
855 out_be32(ioaddr->ctl_addr, ap->ctl);
861 ata_chk_status(ap);
863 ap->ops->irq_clear(ap);
868 * @ap: ATA port to be reset
872 static int scc_pata_prereset(struct ata_port *ap, unsigned long deadline)
874 ap->cbl = ATA_CBL_PATA80;
875 return ata_std_prereset(ap, deadline);
880 * @ap: the target ata_port
886 static void scc_std_postreset (struct ata_port *ap, unsigned int *classes)
891 if (!ap->ops->error_handler)
892 ap->ops->irq_on(ap);
896 ap->ops->dev_select(ap, 1);
898 ap->ops->dev_select(ap, 0);
907 if (ap->ioaddr.ctl_addr)
908 out_be32(ap->ioaddr.ctl_addr, ap->ctl);
915 * @ap: port to handle error for
918 static void scc_error_handler (struct ata_port *ap)
920 ata_bmdma_drive_eh(ap, scc_pata_prereset, scc_std_softreset, NULL,
926 * @ap: Port associated with this ATA transaction.
931 static void scc_bmdma_irq_clear (struct ata_port *ap)
933 void __iomem *mmio = ap->ioaddr.bmdma_addr;
943 * @ap: Port to initialize
949 static int scc_port_start (struct ata_port *ap)
951 void __iomem *mmio = ap->ioaddr.bmdma_addr;
954 rc = ata_port_start(ap);
958 out_be32(mmio + SCC_DMA_PTERADD, ap->prd_dma);
964 * @ap: Port to shut down
969 static void scc_port_stop (struct ata_port *ap)
971 void __iomem *mmio = ap->ioaddr.bmdma_addr;