Lines Matching refs:glob_tmp
43 #define glob_tmp g5 /* Global temporary reg, usable anywhere G */
52 spnwin_patch1_7win: sll %t_wim, 6, %glob_tmp
53 spnwin_patch2_7win: and %glob_tmp, 0x7f, %glob_tmp
84 spnwin_patch1: sll %t_wim, 7, %glob_tmp
85 or %glob_tmp, %twin_tmp, %glob_tmp
86 spnwin_patch2: and %glob_tmp, 0xff, %glob_tmp
102 andn %twin_tmp, %glob_tmp, %twin_tmp ! compute new uwinmask
110 wr %glob_tmp, 0x0, %wim ! set new %wim, this is safe now
119 mov %saved_g5, %g5 ! restore %glob_tmp
136 * %glob_tmp. We cannot set the new %wim first because we
147 wr %glob_tmp, 0x0, %wim ! Now it is safe to set new %wim
207 rd %psr, %glob_tmp
208 andcc %glob_tmp, PSR_PS, %g0
274 SAVE_BOLIXED_USER_STACK(curptr, glob_tmp)
295 * make usage of glob_tmp and t_psr so we leave them defined.
317 sra %sp, 29, %glob_tmp
319 rd %psr, %glob_tmp
324 add %glob_tmp, 0x1, %glob_tmp
325 andncc %glob_tmp, 0x1, %g0
327 and %sp, 0xfff, %glob_tmp ! delay slot
329 rd %psr, %glob_tmp
337 add %glob_tmp, 0x38, %glob_tmp
338 andncc %glob_tmp, 0xff8, %g0
340 lda [%sp] ASI_PTE, %glob_tmp ! have to check first page anyways
344 srl %glob_tmp, 29, %glob_tmp
345 cmp %glob_tmp, 0x6
347 add %sp, 0x38, %glob_tmp /* Is second page in vma hole? */
349 rd %psr, %glob_tmp
354 sra %glob_tmp, 29, %glob_tmp
355 add %glob_tmp, 0x1, %glob_tmp
356 andncc %glob_tmp, 0x1, %g0
358 add %sp, 0x38, %glob_tmp
360 rd %psr, %glob_tmp
365 lda [%glob_tmp] ASI_PTE, %glob_tmp
368 srl %glob_tmp, 29, %glob_tmp
369 cmp %glob_tmp, 0x6 ! can user write to it?
373 rd %psr, %glob_tmp
398 sethi %hi(PAGE_OFFSET), %glob_tmp
399 cmp %glob_tmp, %sp
401 mov AC_M_SFSR, %glob_tmp
404 lda [%glob_tmp] ASI_M_MMUREGS, %g0 ! eat SFSR
406 lda [%g0] ASI_M_MMUREGS, %glob_tmp ! read MMU control
407 or %glob_tmp, 0x2, %glob_tmp ! or in no_fault bit
408 sta %glob_tmp, [%g0] ASI_M_MMUREGS ! set it
414 andn %glob_tmp, 0x2, %glob_tmp
415 sta %glob_tmp, [%g0] ASI_M_MMUREGS
417 mov AC_M_SFAR, %glob_tmp
418 lda [%glob_tmp] ASI_M_MMUREGS, %g0
420 mov AC_M_SFSR, %glob_tmp
421 lda [%glob_tmp] ASI_M_MMUREGS, %glob_tmp
422 andcc %glob_tmp, 0x2, %g0 ! did we fault?
426 rd %psr, %glob_tmp