Lines Matching refs:current_bus
108 int current_bus,
123 current_bus,
130 current_bus,
136 current_bus,
147 current_bus,
220 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
234 current_bus,
250 int current_bus,
255 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
256 PCI_PRIMARY_BUS, current_bus);
257 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
259 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
269 early_write_config_word(hose, top_bus, current_bus, pci_devfn,
271 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
273 early_write_config_word(hose, top_bus, current_bus, pci_devfn,
277 early_write_config_word(hose, top_bus, current_bus, pci_devfn,
279 early_write_config_word(hose, top_bus, current_bus, pci_devfn,
286 int current_bus,
301 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
305 early_write_config_word(hose, top_bus, current_bus, pci_devfn,
307 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
309 early_write_config_word(hose, top_bus, current_bus, pci_devfn,
319 early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
321 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
329 int current_bus,
334 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
335 PCI_PRIMARY_BUS, current_bus);
336 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
338 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
347 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
349 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
356 int current_bus,
377 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
400 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
402 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
406 early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
408 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
416 pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
425 sub_bus = current_bus;
437 early_read_config_word(hose, top_bus, current_bus, pci_devfn,
442 early_read_config_byte(hose, top_bus, current_bus, pci_devfn,
448 early_read_config_word(hose, top_bus, current_bus, pci_devfn,
451 early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
455 current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn),
463 current_bus, sub_bus + 1);
464 pciauto_prescan_setup_bridge(hose, top_bus, current_bus,
470 DBG("Back to bus %.2x\n", current_bus);
471 pciauto_postscan_setup_bridge(hose, top_bus, current_bus,
476 current_bus, sub_bus + 1);
479 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0);
482 current_bus, pci_devfn, sub_bus);
488 DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus);
490 current_bus, pci_devfn, sub_bus);
496 early_read_config_byte(hose, top_bus, current_bus,
508 early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
510 early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
515 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
520 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5);