Lines Matching refs:X_MASK
982 #define X_MASK XRC (0x3f, 0x3ff, 1)
984 /* An X_MASK with the RA field fixed. */
985 #define XRA_MASK (X_MASK | RA_MASK)
987 /* An X_MASK with the RB field fixed. */
988 #define XRB_MASK (X_MASK | RB_MASK)
990 /* An X_MASK with the RT field fixed. */
991 #define XRT_MASK (X_MASK | RT_MASK)
993 /* An X_MASK with the RA and RB fields fixed. */
994 #define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)
996 /* An X_MASK with the RT and RA fields fixed. */
997 #define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)
1003 #define XCMP_MASK (X_MASK | (1 << 22))
1011 #define XTO_MASK (X_MASK | TO_MASK)
1066 #define XFXFXM_MASK (X_MASK | (1 << 20) | (1 << 11))
1075 #define XSPR_MASK (X_MASK | SPR_MASK)
1905 { "tw", X(31,4), X_MASK, PPC, { TO, RA, RB } },
1906 { "t", X(31,4), X_MASK, POWER, { TO, RA, RB } },
1938 { "lwarx", X(31,20), X_MASK, PPC, { RT, RA, RB } },
1940 { "ldx", X(31,21), X_MASK, PPC|B64, { RT, RA, RB } },
1942 { "lwzx", X(31,23), X_MASK, PPC, { RT, RA, RB } },
1943 { "lx", X(31,23), X_MASK, POWER, { RT, RA, RB } },
1945 { "slw", XRC(31,24,0), X_MASK, PPC, { RA, RS, RB } },
1946 { "sl", XRC(31,24,0), X_MASK, POWER, { RA, RS, RB } },
1947 { "slw.", XRC(31,24,1), X_MASK, PPC, { RA, RS, RB } },
1948 { "sl.", XRC(31,24,1), X_MASK, POWER, { RA, RS, RB } },
1955 { "sld", XRC(31,27,0), X_MASK, PPC|B64, { RA, RS, RB } },
1956 { "sld.", XRC(31,27,1), X_MASK, PPC|B64, { RA, RS, RB } },
1958 { "and", XRC(31,28,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1959 { "and.", XRC(31,28,1), X_MASK, PPC|POWER, { RA, RS, RB } },
1961 { "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } },
1962 { "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } },
1978 { "ldux", X(31,53), X_MASK, PPC|B64, { RT, RAL, RB } },
1982 { "lwzux", X(31,55), X_MASK, PPC, { RT, RAL, RB } },
1983 { "lux", X(31,55), X_MASK, POWER, { RT, RA, RB } },
1988 { "andc", XRC(31,60,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1989 { "andc.", XRC(31,60,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2005 { "td", X(31,68), X_MASK, PPC|B64, { TO, RA, RB } },
2015 { "ldarx", X(31,84), X_MASK, PPC|B64, { RT, RA, RB } },
2019 { "lbzx", X(31,87), X_MASK, PPC|POWER, { RT, RA, RB } },
2033 { "lbzux", X(31,119), X_MASK, PPC|POWER, { RT, RAL, RB } },
2035 { "not", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
2036 { "nor", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2037 { "not.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
2038 { "nor.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2063 { "stdx", X(31,149), X_MASK, PPC|B64, { RS, RA, RB } },
2065 { "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA, RB } },
2067 { "stwx", X(31,151), X_MASK, PPC, { RS, RA, RB } },
2068 { "stx", X(31,151), X_MASK, POWER, { RS, RA, RB } },
2070 { "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } },
2071 { "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } },
2073 { "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } },
2074 { "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } },
2076 { "stdux", X(31,181), X_MASK, PPC|B64, { RS, RAS, RB } },
2078 { "stwux", X(31,183), X_MASK, PPC, { RS, RAS, RB } },
2079 { "stux", X(31,183), X_MASK, POWER, { RS, RA, RB } },
2081 { "sliq", XRC(31,184,0), X_MASK, POWER|M601, { RA, RS, SH } },
2082 { "sliq.", XRC(31,184,1), X_MASK, POWER|M601, { RA, RS, SH } },
2104 { "stdcx.", XRC(31,214,1), X_MASK, PPC|B64, { RS, RA, RB } },
2106 { "stbx", X(31,215), X_MASK, PPC|POWER, { RS, RA, RB } },
2108 { "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } },
2109 { "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } },
2111 { "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } },
2112 { "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } },
2151 { "stbux", X(31,247), X_MASK, PPC|POWER, { RS, RAS, RB } },
2153 { "slliq", XRC(31,248,0), X_MASK, POWER|M601, { RA, RS, SH } },
2154 { "slliq.", XRC(31,248,1), X_MASK, POWER|M601, { RA, RS, SH } },
2170 { "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } },
2171 { "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } },
2175 { "lhzx", X(31,279), X_MASK, PPC|POWER, { RT, RA, RB } },
2179 { "eqv", XRC(31,284,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2180 { "eqv.", XRC(31,284,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2185 { "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } },
2187 { "lhzux", X(31,311), X_MASK, PPC|POWER, { RT, RAL, RB } },
2189 { "xor", XRC(31,316,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2190 { "xor.", XRC(31,316,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2192 { "mfdcr", X(31,323), X_MASK, PPC, { RT, SPR } },
2222 { "mfspr", X(31,339), X_MASK, PPC|POWER, { RT, SPR } },
2224 { "lwax", X(31,341), X_MASK, PPC|B64, { RT, RA, RB } },
2226 { "lhax", X(31,343), X_MASK, PPC|POWER, { RT, RA, RB } },
2243 { "mftb", X(31,371), X_MASK, PPC, { RT, TBR } },
2245 { "lwaux", X(31,373), X_MASK, PPC|B64, { RT, RAL, RB } },
2247 { "lhaux", X(31,375), X_MASK, PPC|POWER, { RT, RAL, RB } },
2249 { "sthx", X(31,407), X_MASK, PPC|POWER, { RS, RA, RB } },
2251 { "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } },
2253 { "lfqux", X(31,823), X_MASK, POWER2, { FRT, RA, RB } },
2255 { "stfqx", X(31,919), X_MASK, POWER2, { FRS, RA, RB } },
2257 { "stfqux", X(31,951), X_MASK, POWER2, { FRS, RA, RB } },
2259 { "orc", XRC(31,412,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2260 { "orc.", XRC(31,412,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2267 { "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } },
2269 { "sthux", X(31,439), X_MASK, PPC|POWER, { RS, RAS, RB } },
2271 { "mr", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
2272 { "or", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2273 { "mr.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
2274 { "or.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2276 { "mtdcr", X(31,451), X_MASK, PPC, { SPR, RS } },
2311 { "mtspr", X(31,467), X_MASK, PPC|POWER, { SPR, RS } },
2315 { "nand", XRC(31,476,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2316 { "nand.", XRC(31,476,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2341 { "lswx", X(31,533), X_MASK, PPC, { RT, RA, RB } },
2342 { "lsx", X(31,533), X_MASK, POWER, { RT, RA, RB } },
2344 { "lwbrx", X(31,534), X_MASK, PPC, { RT, RA, RB } },
2345 { "lbrx", X(31,534), X_MASK, POWER, { RT, RA, RB } },
2347 { "lfsx", X(31,535), X_MASK, PPC|POWER, { FRT, RA, RB } },
2349 { "srw", XRC(31,536,0), X_MASK, PPC, { RA, RS, RB } },
2350 { "sr", XRC(31,536,0), X_MASK, POWER, { RA, RS, RB } },
2351 { "srw.", XRC(31,536,1), X_MASK, PPC, { RA, RS, RB } },
2352 { "sr.", XRC(31,536,1), X_MASK, POWER, { RA, RS, RB } },
2354 { "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } },
2355 { "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } },
2357 { "srd", XRC(31,539,0), X_MASK, PPC|B64, { RA, RS, RB } },
2358 { "srd.", XRC(31,539,1), X_MASK, PPC|B64, { RA, RS, RB } },
2360 { "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } },
2361 { "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } },
2365 { "lfsux", X(31,567), X_MASK, PPC|POWER, { FRT, RAS, RB } },
2369 { "lswi", X(31,597), X_MASK, PPC, { RT, RA, NB } },
2370 { "lsi", X(31,597), X_MASK, POWER, { RT, RA, NB } },
2375 { "lfdx", X(31,599), X_MASK, PPC|POWER, { FRT, RA, RB } },
2377 { "mfsri", X(31,627), X_MASK, POWER, { RT, RA, RB } },
2381 { "lfdux", X(31,631), X_MASK, PPC|POWER, { FRT, RAS, RB } },
2385 { "stswx", X(31,661), X_MASK, PPC, { RS, RA, RB } },
2386 { "stsx", X(31,661), X_MASK, POWER, { RS, RA, RB } },
2388 { "stwbrx", X(31,662), X_MASK, PPC, { RS, RA, RB } },
2389 { "stbrx", X(31,662), X_MASK, POWER, { RS, RA, RB } },
2391 { "stfsx", X(31,663), X_MASK, PPC|POWER, { FRS, RA, RB } },
2393 { "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } },
2394 { "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } },
2396 { "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } },
2397 { "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } },
2399 { "stfsux", X(31,695), X_MASK, PPC|POWER, { FRS, RAS, RB } },
2401 { "sriq", XRC(31,696,0), X_MASK, POWER|M601, { RA, RS, SH } },
2402 { "sriq.", XRC(31,696,1), X_MASK, POWER|M601, { RA, RS, SH } },
2404 { "stswi", X(31,725), X_MASK, PPC, { RS, RA, NB } },
2405 { "stsi", X(31,725), X_MASK, POWER, { RS, RA, NB } },
2407 { "stfdx", X(31,727), X_MASK, PPC|POWER, { FRS, RA, RB } },
2409 { "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } },
2410 { "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } },
2412 { "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } },
2413 { "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } },
2415 { "stfdux", X(31,759), X_MASK, PPC|POWER, { FRS, RAS, RB } },
2417 { "srliq", XRC(31,760,0), X_MASK, POWER|M601, { RA, RS, SH } },
2418 { "srliq.", XRC(31,760,1), X_MASK, POWER|M601, { RA, RS, SH } },
2420 { "lhbrx", X(31,790), X_MASK, PPC|POWER, { RT, RA, RB } },
2422 { "sraw", XRC(31,792,0), X_MASK, PPC, { RA, RS, RB } },
2423 { "sra", XRC(31,792,0), X_MASK, POWER, { RA, RS, RB } },
2424 { "sraw.", XRC(31,792,1), X_MASK, PPC, { RA, RS, RB } },
2425 { "sra.", XRC(31,792,1), X_MASK, POWER, { RA, RS, RB } },
2427 { "srad", XRC(31,794,0), X_MASK, PPC|B64, { RA, RS, RB } },
2428 { "srad.", XRC(31,794,1), X_MASK, PPC|B64, { RA, RS, RB } },
2430 { "rac", X(31,818), X_MASK, POWER, { RT, RA, RB } },
2432 { "srawi", XRC(31,824,0), X_MASK, PPC, { RA, RS, SH } },
2433 { "srai", XRC(31,824,0), X_MASK, POWER, { RA, RS, SH } },
2434 { "srawi.", XRC(31,824,1), X_MASK, PPC, { RA, RS, SH } },
2435 { "srai.", XRC(31,824,1), X_MASK, POWER, { RA, RS, SH } },
2439 { "sthbrx", X(31,918), X_MASK, PPC|POWER, { RS, RA, RB } },
2441 { "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } },
2442 { "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } },
2444 { "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } },
2445 { "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } },
2452 { "sraiq", XRC(31,952,0), X_MASK, POWER|M601, { RA, RS, SH } },
2453 { "sraiq.", XRC(31,952,1), X_MASK, POWER|M601, { RA, RS, SH } },
2462 { "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA, RB } },
2572 { "fcmpu", X(63,0), X_MASK|(3<<21), PPC|POWER, { BF, FRA, FRB } },
2636 { "fcmpo", X(63,30), X_MASK|(3<<21), PPC|POWER, { BF, FRA, FRB } },