• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/xmon/

Lines Matching refs:XRC

979 #define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1))
982 #define X_MASK XRC (0x3f, 0x3ff, 1)
1945 { "slw", XRC(31,24,0), X_MASK, PPC, { RA, RS, RB } },
1946 { "sl", XRC(31,24,0), X_MASK, POWER, { RA, RS, RB } },
1947 { "slw.", XRC(31,24,1), X_MASK, PPC, { RA, RS, RB } },
1948 { "sl.", XRC(31,24,1), X_MASK, POWER, { RA, RS, RB } },
1950 { "cntlzw", XRC(31,26,0), XRB_MASK, PPC, { RA, RS } },
1951 { "cntlz", XRC(31,26,0), XRB_MASK, POWER, { RA, RS } },
1952 { "cntlzw.", XRC(31,26,1), XRB_MASK, PPC, { RA, RS } },
1953 { "cntlz.", XRC(31,26,1), XRB_MASK, POWER, { RA, RS } },
1955 { "sld", XRC(31,27,0), X_MASK, PPC|B64, { RA, RS, RB } },
1956 { "sld.", XRC(31,27,1), X_MASK, PPC|B64, { RA, RS, RB } },
1958 { "and", XRC(31,28,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1959 { "and.", XRC(31,28,1), X_MASK, PPC|POWER, { RA, RS, RB } },
1961 { "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } },
1962 { "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } },
1985 { "cntlzd", XRC(31,58,0), XRB_MASK, PPC|B64, { RA, RS } },
1986 { "cntlzd.", XRC(31,58,1), XRB_MASK, PPC|B64, { RA, RS } },
1988 { "andc", XRC(31,60,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1989 { "andc.", XRC(31,60,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2035 { "not", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
2036 { "nor", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2037 { "not.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
2038 { "nor.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2065 { "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA, RB } },
2070 { "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } },
2071 { "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } },
2073 { "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } },
2074 { "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } },
2081 { "sliq", XRC(31,184,0), X_MASK, POWER|M601, { RA, RS, SH } },
2082 { "sliq.", XRC(31,184,1), X_MASK, POWER|M601, { RA, RS, SH } },
2104 { "stdcx.", XRC(31,214,1), X_MASK, PPC|B64, { RS, RA, RB } },
2108 { "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } },
2109 { "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } },
2111 { "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } },
2112 { "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } },
2153 { "slliq", XRC(31,248,0), X_MASK, POWER|M601, { RA, RS, SH } },
2154 { "slliq.", XRC(31,248,1), X_MASK, POWER|M601, { RA, RS, SH } },
2170 { "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } },
2171 { "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } },
2179 { "eqv", XRC(31,284,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2180 { "eqv.", XRC(31,284,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2189 { "xor", XRC(31,316,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2190 { "xor.", XRC(31,316,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2259 { "orc", XRC(31,412,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2260 { "orc.", XRC(31,412,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2271 { "mr", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
2272 { "or", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2273 { "mr.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
2274 { "or.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2315 { "nand", XRC(31,476,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2316 { "nand.", XRC(31,476,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2349 { "srw", XRC(31,536,0), X_MASK, PPC, { RA, RS, RB } },
2350 { "sr", XRC(31,536,0), X_MASK, POWER, { RA, RS, RB } },
2351 { "srw.", XRC(31,536,1), X_MASK, PPC, { RA, RS, RB } },
2352 { "sr.", XRC(31,536,1), X_MASK, POWER, { RA, RS, RB } },
2354 { "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } },
2355 { "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } },
2357 { "srd", XRC(31,539,0), X_MASK, PPC|B64, { RA, RS, RB } },
2358 { "srd.", XRC(31,539,1), X_MASK, PPC|B64, { RA, RS, RB } },
2360 { "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } },
2361 { "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } },
2393 { "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } },
2394 { "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } },
2396 { "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } },
2397 { "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } },
2401 { "sriq", XRC(31,696,0), X_MASK, POWER|M601, { RA, RS, SH } },
2402 { "sriq.", XRC(31,696,1), X_MASK, POWER|M601, { RA, RS, SH } },
2409 { "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } },
2410 { "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } },
2412 { "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } },
2413 { "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } },
2417 { "srliq", XRC(31,760,0), X_MASK, POWER|M601, { RA, RS, SH } },
2418 { "srliq.", XRC(31,760,1), X_MASK, POWER|M601, { RA, RS, SH } },
2422 { "sraw", XRC(31,792,0), X_MASK, PPC, { RA, RS, RB } },
2423 { "sra", XRC(31,792,0), X_MASK, POWER, { RA, RS, RB } },
2424 { "sraw.", XRC(31,792,1), X_MASK, PPC, { RA, RS, RB } },
2425 { "sra.", XRC(31,792,1), X_MASK, POWER, { RA, RS, RB } },
2427 { "srad", XRC(31,794,0), X_MASK, PPC|B64, { RA, RS, RB } },
2428 { "srad.", XRC(31,794,1), X_MASK, PPC|B64, { RA, RS, RB } },
2432 { "srawi", XRC(31,824,0), X_MASK, PPC, { RA, RS, SH } },
2433 { "srai", XRC(31,824,0), X_MASK, POWER, { RA, RS, SH } },
2434 { "srawi.", XRC(31,824,1), X_MASK, PPC, { RA, RS, SH } },
2435 { "srai.", XRC(31,824,1), X_MASK, POWER, { RA, RS, SH } },
2441 { "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } },
2442 { "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } },
2444 { "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } },
2445 { "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } },
2447 { "extsh", XRC(31,922,0), XRB_MASK, PPC, { RA, RS } },
2448 { "exts", XRC(31,922,0), XRB_MASK, POWER, { RA, RS } },
2449 { "extsh.", XRC(31,922,1), XRB_MASK, PPC, { RA, RS } },
2450 { "exts.", XRC(31,922,1), XRB_MASK, POWER, { RA, RS } },
2452 { "sraiq", XRC(31,952,0), X_MASK, POWER|M601, { RA, RS, SH } },
2453 { "sraiq.", XRC(31,952,1), X_MASK, POWER|M601, { RA, RS, SH } },
2455 { "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} },
2456 { "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} },
2464 { "extsw", XRC(31,986,0), XRB_MASK, PPC, { RA, RS } },
2465 { "extsw.", XRC(31,986,1), XRB_MASK, PPC, { RA, RS } },
2574 { "frsp", XRC(63,12,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
2575 { "frsp.", XRC(63,12,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
2577 { "fctiw", XRC(63,14,0), XRA_MASK, PPC, { FRT, FRB } },
2578 { "fcir", XRC(63,14,0), XRA_MASK, POWER2, { FRT, FRB } },
2579 { "fctiw.", XRC(63,14,1), XRA_MASK, PPC, { FRT, FRB } },
2580 { "fcir.", XRC(63,14,1), XRA_MASK, POWER2, { FRT, FRB } },
2582 { "fctiwz", XRC(63,15,0), XRA_MASK, PPC, { FRT, FRB } },
2583 { "fcirz", XRC(63,15,0), XRA_MASK, POWER2, { FRT, FRB } },
2584 { "fctiwz.", XRC(63,15,1), XRA_MASK, PPC, { FRT, FRB } },
2585 { "fcirz.", XRC(63,15,1), XRA_MASK, POWER2, { FRT, FRB } },
2638 { "mtfsb1", XRC(63,38,0), XRARB_MASK, PPC|POWER, { BT } },
2639 { "mtfsb1.", XRC(63,38,1), XRARB_MASK, PPC|POWER, { BT } },
2641 { "fneg", XRC(63,40,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
2642 { "fneg.", XRC(63,40,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
2646 { "mtfsb0", XRC(63,70,0), XRARB_MASK, PPC|POWER, { BT } },
2647 { "mtfsb0.", XRC(63,70,1), XRARB_MASK, PPC|POWER, { BT } },
2649 { "fmr", XRC(63,72,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
2650 { "fmr.", XRC(63,72,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
2652 { "mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } },
2653 { "mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } },
2655 { "fnabs", XRC(63,136,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
2656 { "fnabs.", XRC(63,136,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
2658 { "fabs", XRC(63,264,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
2659 { "fabs.", XRC(63,264,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
2661 { "mffs", XRC(63,583,0), XRARB_MASK, PPC|POWER, { FRT } },
2662 { "mffs.", XRC(63,583,1), XRARB_MASK, PPC|POWER, { FRT } },
2667 { "fctid", XRC(63,814,0), XRA_MASK, PPC|B64, { FRT, FRB } },
2668 { "fctid.", XRC(63,814,1), XRA_MASK, PPC|B64, { FRT, FRB } },
2670 { "fctidz", XRC(63,815,0), XRA_MASK, PPC|B64, { FRT, FRB } },
2671 { "fctidz.", XRC(63,815,1), XRA_MASK, PPC|B64, { FRT, FRB } },
2673 { "fcfid", XRC(63,846,0), XRA_MASK, PPC|B64, { FRT, FRB } },
2674 { "fcfid.", XRC(63,846,1), XRA_MASK, PPC|B64, { FRT, FRB } },