Lines Matching refs:RB
309 /* The RB field in an X, XO, M, or MDS form instruction. */
310 #define RB (44)
314 /* The RB field in an X form instruction when it must be the same as
794 /* The RB field in an X form instruction when it must be the same as
987 /* An X_MASK with the RB field fixed. */
993 /* An X_MASK with the RA and RB fields fixed. */
1058 /* An XO_MASK with the RB field fixed. */
1818 { "rlmi", M(22,0), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
1819 { "rlmi.", M(22,1), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
1821 { "rotlw", MME(23,31,0), MMBME_MASK, PPC, { RA, RS, RB } },
1822 { "rlwnm", M(23,0), M_MASK, PPC, { RA,RS,RB,MBE,ME } },
1823 { "rlnm", M(23,0), M_MASK, POWER, { RA,RS,RB,MBE,ME } },
1824 { "rotlw.", MME(23,31,1), MMBME_MASK, PPC, { RA, RS, RB } },
1825 { "rlwnm.", M(23,1), M_MASK, PPC, { RA,RS,RB,MBE,ME } },
1826 { "rlnm.", M(23,1), M_MASK, POWER, { RA,RS,RB,MBE,ME } },
1863 { "rotld", MDS(30,8,0), MDSMB_MASK, PPC|B64, { RA, RS, RB } },
1864 { "rldcl", MDS(30,8,0), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } },
1865 { "rotld.", MDS(30,8,1), MDSMB_MASK, PPC|B64, { RA, RS, RB } },
1866 { "rldcl.", MDS(30,8,1), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } },
1868 { "rldcr", MDS(30,9,0), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } },
1869 { "rldcr.", MDS(30,9,1), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } },
1871 { "cmpw", XCMPL(31,0,0), XCMPL_MASK, PPC, { OBF, RA, RB } },
1872 { "cmpd", XCMPL(31,0,1), XCMPL_MASK, PPC|B64, { OBF, RA, RB } },
1873 { "cmp", X(31,0), XCMP_MASK, PPC, { BF, L, RA, RB } },
1874 { "cmp", X(31,0), XCMPL_MASK, POWER, { BF, RA, RB } },
1876 { "twlgt", XTO(31,4,TOLGT), XTO_MASK, PPC, { RA, RB } },
1877 { "tlgt", XTO(31,4,TOLGT), XTO_MASK, POWER, { RA, RB } },
1878 { "twllt", XTO(31,4,TOLLT), XTO_MASK, PPC, { RA, RB } },
1879 { "tllt", XTO(31,4,TOLLT), XTO_MASK, POWER, { RA, RB } },
1880 { "tweq", XTO(31,4,TOEQ), XTO_MASK, PPC, { RA, RB } },
1881 { "teq", XTO(31,4,TOEQ), XTO_MASK, POWER, { RA, RB } },
1882 { "twlge", XTO(31,4,TOLGE), XTO_MASK, PPC, { RA, RB } },
1883 { "tlge", XTO(31,4,TOLGE), XTO_MASK, POWER, { RA, RB } },
1884 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPC, { RA, RB } },
1885 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, POWER, { RA, RB } },
1886 { "twlle", XTO(31,4,TOLLE), XTO_MASK, PPC, { RA, RB } },
1887 { "tlle", XTO(31,4,TOLLE), XTO_MASK, POWER, { RA, RB } },
1888 { "twlng", XTO(31,4,TOLNG), XTO_MASK, PPC, { RA, RB } },
1889 { "tlng", XTO(31,4,TOLNG), XTO_MASK, POWER, { RA, RB } },
1890 { "twgt", XTO(31,4,TOGT), XTO_MASK, PPC, { RA, RB } },
1891 { "tgt", XTO(31,4,TOGT), XTO_MASK, POWER, { RA, RB } },
1892 { "twge", XTO(31,4,TOGE), XTO_MASK, PPC, { RA, RB } },
1893 { "tge", XTO(31,4,TOGE), XTO_MASK, POWER, { RA, RB } },
1894 { "twnl", XTO(31,4,TONL), XTO_MASK, PPC, { RA, RB } },
1895 { "tnl", XTO(31,4,TONL), XTO_MASK, POWER, { RA, RB } },
1896 { "twlt", XTO(31,4,TOLT), XTO_MASK, PPC, { RA, RB } },
1897 { "tlt", XTO(31,4,TOLT), XTO_MASK, POWER, { RA, RB } },
1898 { "twle", XTO(31,4,TOLE), XTO_MASK, PPC, { RA, RB } },
1899 { "tle", XTO(31,4,TOLE), XTO_MASK, POWER, { RA, RB } },
1900 { "twng", XTO(31,4,TONG), XTO_MASK, PPC, { RA, RB } },
1901 { "tng", XTO(31,4,TONG), XTO_MASK, POWER, { RA, RB } },
1902 { "twne", XTO(31,4,TONE), XTO_MASK, PPC, { RA, RB } },
1903 { "tne", XTO(31,4,TONE), XTO_MASK, POWER, { RA, RB } },
1905 { "tw", X(31,4), X_MASK, PPC, { TO, RA, RB } },
1906 { "t", X(31,4), X_MASK, POWER, { TO, RA, RB } },
1908 { "subfc", XO(31,8,0,0), XO_MASK, PPC, { RT, RA, RB } },
1909 { "sf", XO(31,8,0,0), XO_MASK, POWER, { RT, RA, RB } },
1910 { "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } },
1911 { "subfc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RA, RB } },
1912 { "sf.", XO(31,8,0,1), XO_MASK, POWER, { RT, RA, RB } },
1913 { "subc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RB, RA } },
1914 { "subfco", XO(31,8,1,0), XO_MASK, PPC, { RT, RA, RB } },
1915 { "sfo", XO(31,8,1,0), XO_MASK, POWER, { RT, RA, RB } },
1916 { "subco", XO(31,8,1,0), XO_MASK, PPC, { RT, RB, RA } },
1917 { "subfco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RA, RB } },
1918 { "sfo.", XO(31,8,1,1), XO_MASK, POWER, { RT, RA, RB } },
1919 { "subco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RB, RA } },
1921 { "mulhdu", XO(31,9,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
1922 { "mulhdu.", XO(31,9,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
1924 { "addc", XO(31,10,0,0), XO_MASK, PPC, { RT, RA, RB } },
1925 { "a", XO(31,10,0,0), XO_MASK, POWER, { RT, RA, RB } },
1926 { "addc.", XO(31,10,0,1), XO_MASK, PPC, { RT, RA, RB } },
1927 { "a.", XO(31,10,0,1), XO_MASK, POWER, { RT, RA, RB } },
1928 { "addco", XO(31,10,1,0), XO_MASK, PPC, { RT, RA, RB } },
1929 { "ao", XO(31,10,1,0), XO_MASK, POWER, { RT, RA, RB } },
1930 { "addco.", XO(31,10,1,1), XO_MASK, PPC, { RT, RA, RB } },
1931 { "ao.", XO(31,10,1,1), XO_MASK, POWER, { RT, RA, RB } },
1933 { "mulhwu", XO(31,11,0,0), XO_MASK, PPC, { RT, RA, RB } },
1934 { "mulhwu.", XO(31,11,0,1), XO_MASK, PPC, { RT, RA, RB } },
1938 { "lwarx", X(31,20), X_MASK, PPC, { RT, RA, RB } },
1940 { "ldx", X(31,21), X_MASK, PPC|B64, { RT, RA, RB } },
1942 { "lwzx", X(31,23), X_MASK, PPC, { RT, RA, RB } },
1943 { "lx", X(31,23), X_MASK, POWER, { RT, RA, RB } },
1945 { "slw", XRC(31,24,0), X_MASK, PPC, { RA, RS, RB } },
1946 { "sl", XRC(31,24,0), X_MASK, POWER, { RA, RS, RB } },
1947 { "slw.", XRC(31,24,1), X_MASK, PPC, { RA, RS, RB } },
1948 { "sl.", XRC(31,24,1), X_MASK, POWER, { RA, RS, RB } },
1955 { "sld", XRC(31,27,0), X_MASK, PPC|B64, { RA, RS, RB } },
1956 { "sld.", XRC(31,27,1), X_MASK, PPC|B64, { RA, RS, RB } },
1958 { "and", XRC(31,28,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1959 { "and.", XRC(31,28,1), X_MASK, PPC|POWER, { RA, RS, RB } },
1961 { "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } },
1962 { "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } },
1964 { "cmplw", XCMPL(31,32,0), XCMPL_MASK, PPC, { OBF, RA, RB } },
1965 { "cmpld", XCMPL(31,32,1), XCMPL_MASK, PPC|B64, { OBF, RA, RB } },
1966 { "cmpl", X(31,32), XCMP_MASK, PPC, { BF, L, RA, RB } },
1967 { "cmpl", X(31,32), XCMPL_MASK, POWER, { BF, RA, RB } },
1969 { "subf", XO(31,40,0,0), XO_MASK, PPC, { RT, RA, RB } },
1970 { "sub", XO(31,40,0,0), XO_MASK, PPC, { RT, RB, RA } },
1971 { "subf.", XO(31,40,0,1), XO_MASK, PPC, { RT, RA, RB } },
1972 { "sub.", XO(31,40,0,1), XO_MASK, PPC, { RT, RB, RA } },
1973 { "subfo", XO(31,40,1,0), XO_MASK, PPC, { RT, RA, RB } },
1974 { "subo", XO(31,40,1,0), XO_MASK, PPC, { RT, RB, RA } },
1975 { "subfo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RA, RB } },
1976 { "subo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RB, RA } },
1978 { "ldux", X(31,53), X_MASK, PPC|B64, { RT, RAL, RB } },
1980 { "dcbst", X(31,54), XRT_MASK, PPC, { RA, RB } },
1982 { "lwzux", X(31,55), X_MASK, PPC, { RT, RAL, RB } },
1983 { "lux", X(31,55), X_MASK, POWER, { RT, RA, RB } },
1988 { "andc", XRC(31,60,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1989 { "andc.", XRC(31,60,1), X_MASK, PPC|POWER, { RA, RS, RB } },
1991 { "tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC|B64, { RA, RB } },
1992 { "tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC|B64, { RA, RB } },
1993 { "tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC|B64, { RA, RB } },
1994 { "tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC|B64, { RA, RB } },
1995 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC|B64, { RA, RB } },
1996 { "tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC|B64, { RA, RB } },
1997 { "tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC|B64, { RA, RB } },
1998 { "tdgt", XTO(31,68,TOGT), XTO_MASK, PPC|B64, { RA, RB } },
1999 { "tdge", XTO(31,68,TOGE), XTO_MASK, PPC|B64, { RA, RB } },
2000 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC|B64, { RA, RB } },
2001 { "tdlt", XTO(31,68,TOLT), XTO_MASK, PPC|B64, { RA, RB } },
2002 { "tdle", XTO(31,68,TOLE), XTO_MASK, PPC|B64, { RA, RB } },
2003 { "tdng", XTO(31,68,TONG), XTO_MASK, PPC|B64, { RA, RB } },
2004 { "tdne", XTO(31,68,TONE), XTO_MASK, PPC|B64, { RA, RB } },
2005 { "td", X(31,68), X_MASK, PPC|B64, { TO, RA, RB } },
2007 { "mulhd", XO(31,73,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2008 { "mulhd.", XO(31,73,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2010 { "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } },
2011 { "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } },
2015 { "ldarx", X(31,84), X_MASK, PPC|B64, { RT, RA, RB } },
2017 { "dcbf", X(31,86), XRT_MASK, PPC, { RA, RB } },
2019 { "lbzx", X(31,87), X_MASK, PPC|POWER, { RT, RA, RB } },
2026 { "mul", XO(31,107,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2027 { "mul.", XO(31,107,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2028 { "mulo", XO(31,107,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2029 { "mulo.", XO(31,107,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2033 { "lbzux", X(31,119), X_MASK, PPC|POWER, { RT, RAL, RB } },
2036 { "nor", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2038 { "nor.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2040 { "subfe", XO(31,136,0,0), XO_MASK, PPC, { RT, RA, RB } },
2041 { "sfe", XO(31,136,0,0), XO_MASK, POWER, { RT, RA, RB } },
2042 { "subfe.", XO(31,136,0,1), XO_MASK, PPC, { RT, RA, RB } },
2043 { "sfe.", XO(31,136,0,1), XO_MASK, POWER, { RT, RA, RB } },
2044 { "subfeo", XO(31,136,1,0), XO_MASK, PPC, { RT, RA, RB } },
2045 { "sfeo", XO(31,136,1,0), XO_MASK, POWER, { RT, RA, RB } },
2046 { "subfeo.", XO(31,136,1,1), XO_MASK, PPC, { RT, RA, RB } },
2047 { "sfeo.", XO(31,136,1,1), XO_MASK, POWER, { RT, RA, RB } },
2049 { "adde", XO(31,138,0,0), XO_MASK, PPC, { RT, RA, RB } },
2050 { "ae", XO(31,138,0,0), XO_MASK, POWER, { RT, RA, RB } },
2051 { "adde.", XO(31,138,0,1), XO_MASK, PPC, { RT, RA, RB } },
2052 { "ae.", XO(31,138,0,1), XO_MASK, POWER, { RT, RA, RB } },
2053 { "addeo", XO(31,138,1,0), XO_MASK, PPC, { RT, RA, RB } },
2054 { "aeo", XO(31,138,1,0), XO_MASK, POWER, { RT, RA, RB } },
2055 { "addeo.", XO(31,138,1,1), XO_MASK, PPC, { RT, RA, RB } },
2056 { "aeo.", XO(31,138,1,1), XO_MASK, POWER, { RT, RA, RB } },
2063 { "stdx", X(31,149), X_MASK, PPC|B64, { RS, RA, RB } },
2065 { "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA, RB } },
2067 { "stwx", X(31,151), X_MASK, PPC, { RS, RA, RB } },
2068 { "stx", X(31,151), X_MASK, POWER, { RS, RA, RB } },
2070 { "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } },
2071 { "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } },
2073 { "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } },
2074 { "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } },
2076 { "stdux", X(31,181), X_MASK, PPC|B64, { RS, RAS, RB } },
2078 { "stwux", X(31,183), X_MASK, PPC, { RS, RAS, RB } },
2079 { "stux", X(31,183), X_MASK, POWER, { RS, RA, RB } },
2104 { "stdcx.", XRC(31,214,1), X_MASK, PPC|B64, { RS, RA, RB } },
2106 { "stbx", X(31,215), X_MASK, PPC|POWER, { RS, RA, RB } },
2108 { "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } },
2109 { "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } },
2111 { "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } },
2112 { "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } },
2123 { "mulld", XO(31,233,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2124 { "mulld.", XO(31,233,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2125 { "mulldo", XO(31,233,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2126 { "mulldo.", XO(31,233,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2137 { "mullw", XO(31,235,0,0), XO_MASK, PPC, { RT, RA, RB } },
2138 { "muls", XO(31,235,0,0), XO_MASK, POWER, { RT, RA, RB } },
2139 { "mullw.", XO(31,235,0,1), XO_MASK, PPC, { RT, RA, RB } },
2140 { "muls.", XO(31,235,0,1), XO_MASK, POWER, { RT, RA, RB } },
2141 { "mullwo", XO(31,235,1,0), XO_MASK, PPC, { RT, RA, RB } },
2142 { "mulso", XO(31,235,1,0), XO_MASK, POWER, { RT, RA, RB } },
2143 { "mullwo.", XO(31,235,1,1), XO_MASK, PPC, { RT, RA, RB } },
2144 { "mulso.", XO(31,235,1,1), XO_MASK, POWER, { RT, RA, RB } },
2146 { "mtsrin", X(31,242), XRA_MASK, PPC|B32, { RS, RB } },
2147 { "mtsri", X(31,242), XRA_MASK, POWER|B32, { RS, RB } },
2149 { "dcbtst", X(31,246), XRT_MASK, PPC, { RA, RB } },
2151 { "stbux", X(31,247), X_MASK, PPC|POWER, { RS, RAS, RB } },
2156 { "doz", XO(31,264,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2157 { "doz.", XO(31,264,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2158 { "dozo", XO(31,264,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2159 { "dozo.", XO(31,264,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2161 { "add", XO(31,266,0,0), XO_MASK, PPC, { RT, RA, RB } },
2162 { "cax", XO(31,266,0,0), XO_MASK, POWER, { RT, RA, RB } },
2163 { "add.", XO(31,266,0,1), XO_MASK, PPC, { RT, RA, RB } },
2164 { "cax.", XO(31,266,0,1), XO_MASK, POWER, { RT, RA, RB } },
2165 { "addo", XO(31,266,1,0), XO_MASK, PPC, { RT, RA, RB } },
2166 { "caxo", XO(31,266,1,0), XO_MASK, POWER, { RT, RA, RB } },
2167 { "addo.", XO(31,266,1,1), XO_MASK, PPC, { RT, RA, RB } },
2168 { "caxo.", XO(31,266,1,1), XO_MASK, POWER, { RT, RA, RB } },
2170 { "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } },
2171 { "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } },
2173 { "dcbt", X(31,278), XRT_MASK, PPC, { RA, RB } },
2175 { "lhzx", X(31,279), X_MASK, PPC|POWER, { RT, RA, RB } },
2177 { "icbt", X(31,262), XRT_MASK, PPC, { RA, RB } },
2179 { "eqv", XRC(31,284,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2180 { "eqv.", XRC(31,284,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2182 { "tlbie", X(31,306), XRTRA_MASK, PPC, { RB } },
2183 { "tlbi", X(31,306), XRTRA_MASK, POWER, { RB } },
2185 { "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } },
2187 { "lhzux", X(31,311), X_MASK, PPC|POWER, { RT, RAL, RB } },
2189 { "xor", XRC(31,316,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2190 { "xor.", XRC(31,316,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2194 { "div", XO(31,331,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2195 { "div.", XO(31,331,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2196 { "divo", XO(31,331,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2197 { "divo.", XO(31,331,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2224 { "lwax", X(31,341), X_MASK, PPC|B64, { RT, RA, RB } },
2226 { "lhax", X(31,343), X_MASK, PPC|POWER, { RT, RA, RB } },
2228 { "dccci", X(31,454), XRT_MASK, PPC, { RA, RB } },
2235 { "divs", XO(31,363,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2236 { "divs.", XO(31,363,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2237 { "divso", XO(31,363,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2238 { "divso.", XO(31,363,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2245 { "lwaux", X(31,373), X_MASK, PPC|B64, { RT, RAL, RB } },
2247 { "lhaux", X(31,375), X_MASK, PPC|POWER, { RT, RAL, RB } },
2249 { "sthx", X(31,407), X_MASK, PPC|POWER, { RS, RA, RB } },
2251 { "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } },
2253 { "lfqux", X(31,823), X_MASK, POWER2, { FRT, RA, RB } },
2255 { "stfqx", X(31,919), X_MASK, POWER2, { FRS, RA, RB } },
2257 { "stfqux", X(31,951), X_MASK, POWER2, { FRS, RA, RB } },
2259 { "orc", XRC(31,412,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2260 { "orc.", XRC(31,412,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2265 { "slbie", X(31,434), XRTRA_MASK, PPC|B64, { RB } },
2267 { "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } },
2269 { "sthux", X(31,439), X_MASK, PPC|POWER, { RS, RAS, RB } },
2272 { "or", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2274 { "or.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2278 { "divdu", XO(31,457,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2279 { "divdu.", XO(31,457,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2280 { "divduo", XO(31,457,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2281 { "divduo.", XO(31,457,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2283 { "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } },
2284 { "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } },
2285 { "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } },
2286 { "divwuo.", XO(31,459,1,1), XO_MASK, PPC, { RT, RA, RB } },
2313 { "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } },
2315 { "nand", XRC(31,476,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2316 { "nand.", XRC(31,476,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2323 { "divd", XO(31,489,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2324 { "divd.", XO(31,489,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2325 { "divdo", XO(31,489,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2326 { "divdo.", XO(31,489,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2328 { "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } },
2329 { "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } },
2330 { "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } },
2331 { "divwo.", XO(31,491,1,1), XO_MASK, PPC, { RT, RA, RB } },
2341 { "lswx", X(31,533), X_MASK, PPC, { RT, RA, RB } },
2342 { "lsx", X(31,533), X_MASK, POWER, { RT, RA, RB } },
2344 { "lwbrx", X(31,534), X_MASK, PPC, { RT, RA, RB } },
2345 { "lbrx", X(31,534), X_MASK, POWER, { RT, RA, RB } },
2347 { "lfsx", X(31,535), X_MASK, PPC|POWER, { FRT, RA, RB } },
2349 { "srw", XRC(31,536,0), X_MASK, PPC, { RA, RS, RB } },
2350 { "sr", XRC(31,536,0), X_MASK, POWER, { RA, RS, RB } },
2351 { "srw.", XRC(31,536,1), X_MASK, PPC, { RA, RS, RB } },
2352 { "sr.", XRC(31,536,1), X_MASK, POWER, { RA, RS, RB } },
2354 { "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } },
2355 { "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } },
2357 { "srd", XRC(31,539,0), X_MASK, PPC|B64, { RA, RS, RB } },
2358 { "srd.", XRC(31,539,1), X_MASK, PPC|B64, { RA, RS, RB } },
2360 { "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } },
2361 { "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } },
2365 { "lfsux", X(31,567), X_MASK, PPC|POWER, { FRT, RAS, RB } },
2375 { "lfdx", X(31,599), X_MASK, PPC|POWER, { FRT, RA, RB } },
2377 { "mfsri", X(31,627), X_MASK, POWER, { RT, RA, RB } },
2381 { "lfdux", X(31,631), X_MASK, PPC|POWER, { FRT, RAS, RB } },
2383 { "mfsrin", X(31,659), XRA_MASK, PPC|B32, { RT, RB } },
2385 { "stswx", X(31,661), X_MASK, PPC, { RS, RA, RB } },
2386 { "stsx", X(31,661), X_MASK, POWER, { RS, RA, RB } },
2388 { "stwbrx", X(31,662), X_MASK, PPC, { RS, RA, RB } },
2389 { "stbrx", X(31,662), X_MASK, POWER, { RS, RA, RB } },
2391 { "stfsx", X(31,663), X_MASK, PPC|POWER, { FRS, RA, RB } },
2393 { "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } },
2394 { "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } },
2396 { "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } },
2397 { "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } },
2399 { "stfsux", X(31,695), X_MASK, PPC|POWER, { FRS, RAS, RB } },
2407 { "stfdx", X(31,727), X_MASK, PPC|POWER, { FRS, RA, RB } },
2409 { "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } },
2410 { "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } },
2412 { "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } },
2413 { "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } },
2415 { "stfdux", X(31,759), X_MASK, PPC|POWER, { FRS, RAS, RB } },
2420 { "lhbrx", X(31,790), X_MASK, PPC|POWER, { RT, RA, RB } },
2422 { "sraw", XRC(31,792,0), X_MASK, PPC, { RA, RS, RB } },
2423 { "sra", XRC(31,792,0), X_MASK, POWER, { RA, RS, RB } },
2424 { "sraw.", XRC(31,792,1), X_MASK, PPC, { RA, RS, RB } },
2425 { "sra.", XRC(31,792,1), X_MASK, POWER, { RA, RS, RB } },
2427 { "srad", XRC(31,794,0), X_MASK, PPC|B64, { RA, RS, RB } },
2428 { "srad.", XRC(31,794,1), X_MASK, PPC|B64, { RA, RS, RB } },
2430 { "rac", X(31,818), X_MASK, POWER, { RT, RA, RB } },
2439 { "sthbrx", X(31,918), X_MASK, PPC|POWER, { RS, RA, RB } },
2441 { "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } },
2442 { "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } },
2444 { "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } },
2445 { "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } },
2458 { "iccci", X(31,966), XRT_MASK, PPC, { RA, RB } },
2460 { "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } },
2462 { "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA, RB } },
2467 { "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
2468 { "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } },