Lines Matching defs:port
174 int ppc440spe_init_pcie_rootport(int port)
189 * Initialize various parts of the PCI Express core for our port:
191 * - Set as a root port and enable max width
197 switch (port) {
250 switch (port) {
257 printk(KERN_INFO "PCIE%d: PGRST inactive\n", port);
259 printk(KERN_WARNING "PGRST for PCIE%d failed %08x\n", port, val);
261 switch (port) {
270 switch (port) {
292 utl_base = ioremap64(0xc10000000ull + 0x1000 * port, 0x100);
314 switch (port) {
337 switch (port) {
361 void ppc440spe_setup_pcie(struct pci_controller *hose, int port)
368 hose->cfg_data = ioremap64(0xc40000000ull + port * 0x40000000,
373 * Set bus numbers on our root port
375 mbase = ioremap64(0xc50000000ull + port * 0x40000000, 4096);
388 switch (port) {