Lines Matching refs:r12
244 stw r12,GPR12(r11); \
248 mfspr r12,SPRN_SPRG1; \
249 stw r12,GPR11(r11); \
252 mfspr r12,SPRN_SRR0; \
265 * r11, r12 (SRR0), and r9 (SRR1).
347 mr r4,r12 /* SRR0 is fault address */
349 1: mr r4,r12
830 lis r12,__vtop_table_begin@h
831 ori r12,r12,__vtop_table_begin@l
832 add r12,r12,r10 /* table begin phys address */
836 subi r12,r12,4
838 1: lwzu r14,4(r12) /* virt address of instruction */
846 cmpw r12,r13
864 lis r12,__ptov_table_begin@h
865 ori r12,r12,__ptov_table_begin@l
866 add r12,r12,r10 /* table begin phys address */
870 subi r12,r12,4
872 1: lwzu r14,4(r12) /* virt address of instruction */
880 cmpw r12,r13