Lines Matching refs:out_le32
171 out_le32(mv64x60_base + mpsc_routing_base + MPSC_MRR, 0x3ffffe38);
174 out_le32(mv64x60_base + GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
189 out_le32(mv64x60_base + com2mem_tab[i][0], v);
193 out_le32(mv64x60_base + com2mem_tab[i][1], v);
199 out_le32(mv64x60_base + MV64360_MPSC_0_REMAP, 0);
200 out_le32(mv64x60_base + MV64360_MPSC_1_REMAP, 0);
201 out_le32(mv64x60_base + MV64360_MPSC2MEM_ACC_PROT_0, prot_bits);
202 out_le32(mv64x60_base + MV64360_MPSC2MEM_ACC_PROT_1, prot_bits);
203 out_le32(mv64x60_base + MV64360_MPSC2MEM_BAR_ENABLE, enables);
208 out_le32(mv64x60_base + mpsc_routing_base + MPSC_RCRR, 0x00000100);
209 out_le32(mv64x60_base + mpsc_routing_base + MPSC_TCRR, 0x00000100);
212 out_le32(mv64x60_base + MV64x60_SDMA_INTR_OFFSET + SDMA_INTR_MASK, 0);
214 out_le32(mv64x60_base + SDMA_SCRDP + sdma_base, (int)&rd[chan][0]);
215 out_le32(mv64x60_base + SDMA_SCTDP + sdma_base,
217 out_le32(mv64x60_base + SDMA_SFTDP + sdma_base,
220 out_le32(mv64x60_base + SDMA_SDC + sdma_base,
225 out_le32(mv64x60_base + brg_bcr,
229 out_le32(mv64x60_base + MPSC_MMCRL + mpsc_base[chan], 0x000004c4);
230 out_le32(mv64x60_base + MPSC_MMCRH + mpsc_base[chan], 0x04400400);
232 out_le32(mv64x60_base + MPSC_CHR_1 + mpsc_base[chan], 0);
233 out_le32(mv64x60_base + MPSC_CHR_9 + mpsc_base[chan], 0);
234 out_le32(mv64x60_base + MPSC_CHR_10 + mpsc_base[chan], 0);
235 out_le32(mv64x60_base + MPSC_CHR_3 + mpsc_base[chan], 4);
236 out_le32(mv64x60_base + MPSC_CHR_4 + mpsc_base[chan], 0);
237 out_le32(mv64x60_base + MPSC_CHR_5 + mpsc_base[chan], 0);
238 out_le32(mv64x60_base + MPSC_CHR_6 + mpsc_base[chan], 0);
239 out_le32(mv64x60_base + MPSC_CHR_7 + mpsc_base[chan], 0);
240 out_le32(mv64x60_base + MPSC_CHR_8 + mpsc_base[chan], 0);
243 out_le32(mv64x60_base + MPSC_MPCR + mpsc_base[chan], (3 << 12));
244 out_le32(mv64x60_base + SDMA_SDCM + sdma_base, SDMA_SDCM_ERD);
245 out_le32(mv64x60_base + MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_EH);
258 out_le32(mv64x60_base + MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_RA);
261 out_le32(mv64x60_base + sdma_regs[chan].sdcm,
307 out_le32(mv64x60_base + sdma_regs[com_port].sctdp, (int)tdp);
308 out_le32(mv64x60_base + sdma_regs[com_port].sftdp, (int)tdp);
309 out_le32(mv64x60_base + sdma_regs[com_port].sdcm,