Lines Matching refs:r8
36 li r8,MSR_IP|MSR_FP
37 mtmsr r8
47 li r8,0
48 mtspr SPRN_DBAT0U,r8
49 mtspr SPRN_DBAT0L,r8
50 mtspr SPRN_DBAT1U,r8
51 mtspr SPRN_DBAT1L,r8
52 mtspr SPRN_DBAT2U,r8
53 mtspr SPRN_DBAT2L,r8
54 mtspr SPRN_DBAT3U,r8
55 mtspr SPRN_DBAT3L,r8
57 mtspr SPRN_IBAT0U,r8
58 mtspr SPRN_IBAT0L,r8
59 mtspr SPRN_IBAT1U,r8
60 mtspr SPRN_IBAT1L,r8
61 mtspr SPRN_IBAT2U,r8
62 mtspr SPRN_IBAT2L,r8
63 mtspr SPRN_IBAT3U,r8
64 mtspr SPRN_IBAT3L,r8
70 li r8,16 /* load up segment register values */
71 mtctr r8 /* for context 0 */
72 lis r8,0x2000 /* Ku = 1, VSID = 0 */
74 3: mtsrin r8,r10
75 addi r8,r8,0x111 /* increment VSID */
83 li r8,0
84 ori r8,r8,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
86 or r11,r11,r8
87 andc r10,r11,r8
89 mtspr SPRN_HID0,r8
108 mfspr r8,SPRN_L2CR
109 rlwinm r8,r8,0,1,31
110 oris r8,r8,L2CR_L2I@h
113 mtspr SPRN_L2CR,r8
118 mfspr r8,SPRN_PVR
119 srwi r8,r8,16
120 cmplwi cr0,r8,0x8000 /* 7450 */
121 cmplwi cr1,r8,0x8001 /* 7455 */
122 cmplwi cr2,r8,0x8002 /* 7457 */
127 1: mfspr r8,SPRN_L2CR /* On 745x, poll L2I bit (bit 10) */
128 rlwinm. r9,r8,0,10,10
132 2: mfspr r8,SPRN_L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */
133 rlwinm. r9,r8,0,31,31
136 3: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */
139 mtspr SPRN_L2CR,r8
149 mfspr r8,SPRN_L3CR
150 rlwinm r8,r8,0,1,31
151 ori r8,r8,L3CR_L3I@l
154 mtspr SPRN_L3CR,r8
159 1: mfspr r8,SPRN_L3CR
160 rlwinm. r9,r8,0,21,21
163 rlwinm r8,r8,0,22,20 /* Turn off L3I bit */
166 mtspr SPRN_L3CR,r8
219 addze r8,r5
221 cmpw 0,r5,r8
250 addi r4,r4,_etext@l # r8 = &_etext