Lines Matching defs:mmcr0
99 * adjust the mmcr0.en[0-5] and mmcr0.inten[0-5] values obtained from the
107 sys->mmcr0 &= ~(0x1UL << pmc);
108 sys->mmcr0 &= ~(0x1UL << (pmc+12));
113 sys->mmcr0 |= PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN;
115 sys->mmcr0 &= ~(PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN);
118 sys->mmcr0 |= PA6T_MMCR0_PREN;
120 sys->mmcr0 &= ~PA6T_MMCR0_PREN;
123 * The performance counter event settings are given in the mmcr0 and
127 mmcr0_val = sys->mmcr0;
129 pr_debug("mmcr0_val inited to %016lx\n", sys->mmcr0);
143 u64 mmcr0 = mmcr0_val;
147 mmcr0 &= ~(0x3FUL);
148 mtspr(SPRN_PA6T_MMCR0, mmcr0);
153 pr_debug("setup on cpu %d, mmcr0 %016lx\n", smp_processor_id(),
164 u64 mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
172 mtspr(SPRN_PA6T_MMCR0, mmcr0);
176 pr_debug("start on cpu %d, mmcr0 %lx\n", smp_processor_id(), mmcr0);
181 u64 mmcr0;
184 mmcr0 = mfspr(SPRN_PA6T_MMCR0);
185 mmcr0 |= PA6T_MMCR0_FCM0;
186 mtspr(SPRN_PA6T_MMCR0, mmcr0);
190 pr_debug("stop on cpu %d, mmcr0 %lx\n", smp_processor_id(), mmcr0);
201 u64 mmcr0;
204 mmcr0 = mfspr(SPRN_PA6T_MMCR0);
205 mtspr(SPRN_PA6T_MMCR0, mmcr0 | PA6T_MMCR0_HANDDIS);
214 if (mmcr0 & PA6T_MMCR0_SIARLOG)
223 /* Restore mmcr0 to a good known value since the PMI changes it */
224 mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
225 mtspr(SPRN_PA6T_MMCR0, mmcr0);